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iio: adc: ad7768-1: Fix conversion result sign
The ad7768-1 ADC output code is two's complement, meaning that the voltage conversion result is a signed value.. Since the value is a 24 bit one, stored in a 32 bit variable, the sign should be extended in order to get the correct representation. Also the channel description has been updated to signed representation, to match the ADC specifications. Fixes: a5f8c7d ("iio: adc: Add AD7768-1 ADC basic support") Reviewed-by: David Lechner <[email protected]> Reviewed-by: Marcelo Schmitt <[email protected]> Signed-off-by: Sergiu Cuciurean <[email protected]> Signed-off-by: Jonathan Santos <[email protected]> Cc: <[email protected]> Link: https://patch.msgid.link/505994d3b71c2aa38ba714d909a68e021f12124c.1741268122.git.Jonathan.Santos@analog.com Signed-off-by: Jonathan Cameron <[email protected]>
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drivers/iio/adc/ad7768-1.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -142,7 +142,7 @@ static const struct iio_chan_spec ad7768_channels[] = {
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.channel = 0,
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.scan_index = 0,
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.scan_type = {
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.sign = 'u',
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.sign = 's',
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.realbits = 24,
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.storagebits = 32,
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.shift = 8,
@@ -373,7 +373,7 @@ static int ad7768_read_raw(struct iio_dev *indio_dev,
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iio_device_release_direct(indio_dev);
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if (ret < 0)
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return ret;
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*val = ret;
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*val = sign_extend32(ret, chan->scan_type.realbits - 1);
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return IIO_VAL_INT;
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