mips: dts: ralink: mt7621: reorder serial0 properties

Reorder serial0 properties according to the guidelines laid
out in Documentation/devicetree/bindings/dts-coding-style.rst

Acked-by: Sergio Paracuellos <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Signed-off-by: Justin Swartz <[email protected]>
Reviewed-by: Arınç ÜNAL <[email protected]>
Signed-off-by: Thomas Bogendoerfer <[email protected]>

Author: jhswartz

arch/mips/boot/dts/ralink/mt7621.dtsi

@@ -115,13 +115,14 @@
 			compatible = "ns16550a";
 			reg = <0xc00 0x100>;
 
+			reg-io-width = <4>;
+			reg-shift = <2>;
+
 			clocks = <&sysc MT7621_CLK_UART1>;
 
 			interrupt-parent = <&gic>;
 			interrupts = <GIC_SHARED 26 IRQ_TYPE_LEVEL_HIGH>;
 
-			reg-shift = <2>;
-			reg-io-width = <4>;
 			no-loopback-test;
 
 			pinctrl-names = "default";