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Commit 831010d

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Reza Aminialexdeucher
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drm/amd/display: Implement AMD VSIF V3
[Why] To support V3 [How] Generate new VSIF for V3 Signed-off-by: Reza Amini <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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drivers/gpu/drm/amd/display/dc/core/dc_stream.c

Lines changed: 19 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -244,6 +244,25 @@ struct dc_stream_status *dc_stream_get_status(
244244
return dc_stream_get_status_from_state(dc->current_state, stream);
245245
}
246246

247+
#ifndef TRIM_FSFT
248+
/**
249+
* dc_optimize_timing() - dc to optimize timing
250+
*/
251+
bool dc_optimize_timing(
252+
struct dc_crtc_timing *timing,
253+
unsigned int max_input_rate_in_khz)
254+
{
255+
//optimization is expected to assing a value to these:
256+
//timing->pix_clk_100hz
257+
//timing->v_front_porch
258+
//timing->v_total
259+
//timing->fast_transport_output_rate_100hz;
260+
timing->fast_transport_output_rate_100hz = timing->pix_clk_100hz;
261+
262+
return true;
263+
}
264+
#endif
265+
247266

248267
/**
249268
* dc_stream_set_cursor_attributes() - Update cursor attributes and set cursor surface address

drivers/gpu/drm/amd/display/dc/dc_hw_types.h

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -713,6 +713,9 @@ struct dc_crtc_timing_flags {
713713
uint32_t LTE_340MCSC_SCRAMBLE:1;
714714

715715
uint32_t DSC : 1; /* Use DSC with this timing */
716+
#ifndef TRIM_FSFT
717+
uint32_t FAST_TRANSPORT: 1;
718+
#endif
716719
};
717720

718721
enum dc_timing_3d_format {
@@ -772,6 +775,10 @@ struct dc_crtc_timing {
772775
enum dc_aspect_ratio aspect_ratio;
773776
enum scanning_type scan_type;
774777

778+
#ifndef TRIM_FSFT
779+
uint32_t fast_transport_output_rate_100hz;
780+
#endif
781+
775782
struct dc_crtc_timing_flags flags;
776783
struct dc_dsc_config dsc_cfg;
777784
};

drivers/gpu/drm/amd/display/dc/dc_stream.h

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -419,6 +419,12 @@ struct dc_stream_status *dc_stream_get_status_from_state(
419419
struct dc_stream_status *dc_stream_get_status(
420420
struct dc_stream_state *dc_stream);
421421

422+
#ifndef TRIM_FSFT
423+
bool dc_optimize_timing(
424+
struct dc_crtc_timing *timing,
425+
unsigned int max_input_rate_in_khz);
426+
#endif
427+
422428
/*******************************************************************************
423429
* Cursor interfaces - To manages the cursor within a stream
424430
******************************************************************************/

drivers/gpu/drm/amd/display/modules/freesync/freesync.c

Lines changed: 41 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -760,9 +760,35 @@ static void build_vrr_infopacket_v2(enum signal_type signal,
760760

761761
infopacket->valid = true;
762762
}
763+
#ifndef TRIM_FSFT
764+
static void build_vrr_infopacket_fast_transport_data(
765+
bool ftActive,
766+
unsigned int ftOutputRate,
767+
struct dc_info_packet *infopacket)
768+
{
769+
/* PB9 : bit7 - fast transport Active*/
770+
unsigned char activeBit = (ftActive) ? 1 << 7 : 0;
771+
772+
infopacket->sb[1] &= ~activeBit; //clear bit
773+
infopacket->sb[1] |= activeBit; //set bit
774+
775+
/* PB13 : Target Output Pixel Rate [kHz] - bits 7:0 */
776+
infopacket->sb[13] = ftOutputRate & 0xFF;
777+
778+
/* PB14 : Target Output Pixel Rate [kHz] - bits 15:8 */
779+
infopacket->sb[14] = (ftOutputRate >> 8) & 0xFF;
780+
781+
/* PB15 : Target Output Pixel Rate [kHz] - bits 23:16 */
782+
infopacket->sb[15] = (ftOutputRate >> 16) & 0xFF;
783+
784+
}
785+
#endif
763786

764787
static void build_vrr_infopacket_v3(enum signal_type signal,
765788
const struct mod_vrr_params *vrr,
789+
#ifndef TRIM_FSFT
790+
bool ftActive, unsigned int ftOutputRate,
791+
#endif
766792
enum color_transfer_func app_tf,
767793
struct dc_info_packet *infopacket)
768794
{
@@ -773,6 +799,13 @@ static void build_vrr_infopacket_v3(enum signal_type signal,
773799

774800
build_vrr_infopacket_fs2_data(app_tf, infopacket);
775801

802+
#ifndef TRIM_FSFT
803+
build_vrr_infopacket_fast_transport_data(
804+
ftActive,
805+
ftOutputRate,
806+
infopacket);
807+
#endif
808+
776809
build_vrr_infopacket_checksum(&payload_size, infopacket);
777810

778811
infopacket->valid = true;
@@ -795,7 +828,15 @@ void mod_freesync_build_vrr_infopacket(struct mod_freesync *mod_freesync,
795828

796829
switch (packet_type) {
797830
case PACKET_TYPE_FS_V3:
831+
#ifndef TRIM_FSFT
832+
build_vrr_infopacket_v3(
833+
stream->signal, vrr,
834+
stream->timing.flags.FAST_TRANSPORT,
835+
stream->timing.fast_transport_output_rate_100hz,
836+
app_tf, infopacket);
837+
#else
798838
build_vrr_infopacket_v3(stream->signal, vrr, app_tf, infopacket);
839+
#endif
799840
break;
800841
case PACKET_TYPE_FS_V2:
801842
build_vrr_infopacket_v2(stream->signal, vrr, app_tf, infopacket);

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