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sunilmutbjorn-helgaas
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PCI: hv: Make the code arch neutral by adding arch specific interfaces
Encapsulate arch dependencies in Hyper-V vPCI through a set of arch-dependent interfaces. Adding these arch specific interfaces will allow for an implementation for other architectures, such as arm64. There are no functional changes expected from this patch. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Sunil Muthuswamy <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Reviewed-by: Boqun Feng <[email protected]> Reviewed-by: Marc Zyngier <[email protected]> Reviewed-by: Michael Kelley <[email protected]>
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4 files changed

+87
-65
lines changed

arch/x86/include/asm/hyperv-tlfs.h

Lines changed: 33 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -602,6 +602,39 @@ enum hv_interrupt_type {
602602
HV_X64_INTERRUPT_TYPE_MAXIMUM = 0x000A,
603603
};
604604

605+
union hv_msi_address_register {
606+
u32 as_uint32;
607+
struct {
608+
u32 reserved1:2;
609+
u32 destination_mode:1;
610+
u32 redirection_hint:1;
611+
u32 reserved2:8;
612+
u32 destination_id:8;
613+
u32 msi_base:12;
614+
};
615+
} __packed;
616+
617+
union hv_msi_data_register {
618+
u32 as_uint32;
619+
struct {
620+
u32 vector:8;
621+
u32 delivery_mode:3;
622+
u32 reserved1:3;
623+
u32 level_assert:1;
624+
u32 trigger_mode:1;
625+
u32 reserved2:16;
626+
};
627+
} __packed;
628+
629+
/* HvRetargetDeviceInterrupt hypercall */
630+
union hv_msi_entry {
631+
u64 as_uint64;
632+
struct {
633+
union hv_msi_address_register address;
634+
union hv_msi_data_register data;
635+
} __packed;
636+
};
637+
605638
#include <asm-generic/hyperv-tlfs.h>
606639

607640
#endif

arch/x86/include/asm/mshyperv.h

Lines changed: 0 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -169,13 +169,6 @@ bool hv_vcpu_is_preempted(int vcpu);
169169
static inline void hv_apic_init(void) {}
170170
#endif
171171

172-
static inline void hv_set_msi_entry_from_desc(union hv_msi_entry *msi_entry,
173-
struct msi_desc *msi_desc)
174-
{
175-
msi_entry->address.as_uint32 = msi_desc->msg.address_lo;
176-
msi_entry->data.as_uint32 = msi_desc->msg.data;
177-
}
178-
179172
struct irq_domain *hv_create_pci_msi_domain(void);
180173

181174
int hv_map_ioapic_interrupt(int ioapic_id, bool level, int vcpu, int vector,

drivers/pci/controller/pci-hyperv.c

Lines changed: 54 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -43,9 +43,6 @@
4343
#include <linux/pci-ecam.h>
4444
#include <linux/delay.h>
4545
#include <linux/semaphore.h>
46-
#include <linux/irqdomain.h>
47-
#include <asm/irqdomain.h>
48-
#include <asm/apic.h>
4946
#include <linux/irq.h>
5047
#include <linux/msi.h>
5148
#include <linux/hyperv.h>
@@ -583,6 +580,42 @@ struct hv_pci_compl {
583580

584581
static void hv_pci_onchannelcallback(void *context);
585582

583+
#ifdef CONFIG_X86
584+
#define DELIVERY_MODE APIC_DELIVERY_MODE_FIXED
585+
#define FLOW_HANDLER handle_edge_irq
586+
#define FLOW_NAME "edge"
587+
588+
static int hv_pci_irqchip_init(void)
589+
{
590+
return 0;
591+
}
592+
593+
static struct irq_domain *hv_pci_get_root_domain(void)
594+
{
595+
return x86_vector_domain;
596+
}
597+
598+
static unsigned int hv_msi_get_int_vector(struct irq_data *data)
599+
{
600+
struct irq_cfg *cfg = irqd_cfg(data);
601+
602+
return cfg->vector;
603+
}
604+
605+
static void hv_set_msi_entry_from_desc(union hv_msi_entry *msi_entry,
606+
struct msi_desc *msi_desc)
607+
{
608+
msi_entry->address.as_uint32 = msi_desc->msg.address_lo;
609+
msi_entry->data.as_uint32 = msi_desc->msg.data;
610+
}
611+
612+
static int hv_msi_prepare(struct irq_domain *domain, struct device *dev,
613+
int nvec, msi_alloc_info_t *info)
614+
{
615+
return pci_msi_prepare(domain, dev, nvec, info);
616+
}
617+
#endif /* CONFIG_X86 */
618+
586619
/**
587620
* hv_pci_generic_compl() - Invoked for a completion packet
588621
* @context: Set up by the sender of the packet.
@@ -1191,14 +1224,6 @@ static void hv_msi_free(struct irq_domain *domain, struct msi_domain_info *info,
11911224
put_pcichild(hpdev);
11921225
}
11931226

1194-
static int hv_set_affinity(struct irq_data *data, const struct cpumask *dest,
1195-
bool force)
1196-
{
1197-
struct irq_data *parent = data->parent_data;
1198-
1199-
return parent->chip->irq_set_affinity(parent, dest, force);
1200-
}
1201-
12021227
static void hv_irq_mask(struct irq_data *data)
12031228
{
12041229
pci_msi_mask_irq(data);
@@ -1217,7 +1242,6 @@ static void hv_irq_mask(struct irq_data *data)
12171242
static void hv_irq_unmask(struct irq_data *data)
12181243
{
12191244
struct msi_desc *msi_desc = irq_data_get_msi_desc(data);
1220-
struct irq_cfg *cfg = irqd_cfg(data);
12211245
struct hv_retarget_device_interrupt *params;
12221246
struct hv_pcibus_device *hbus;
12231247
struct cpumask *dest;
@@ -1246,7 +1270,7 @@ static void hv_irq_unmask(struct irq_data *data)
12461270
(hbus->hdev->dev_instance.b[7] << 8) |
12471271
(hbus->hdev->dev_instance.b[6] & 0xf8) |
12481272
PCI_FUNC(pdev->devfn);
1249-
params->int_target.vector = cfg->vector;
1273+
params->int_target.vector = hv_msi_get_int_vector(data);
12501274

12511275
/*
12521276
* Honoring apic->delivery_mode set to APIC_DELIVERY_MODE_FIXED by
@@ -1347,7 +1371,7 @@ static u32 hv_compose_msi_req_v1(
13471371
int_pkt->wslot.slot = slot;
13481372
int_pkt->int_desc.vector = vector;
13491373
int_pkt->int_desc.vector_count = 1;
1350-
int_pkt->int_desc.delivery_mode = APIC_DELIVERY_MODE_FIXED;
1374+
int_pkt->int_desc.delivery_mode = DELIVERY_MODE;
13511375

13521376
/*
13531377
* Create MSI w/ dummy vCPU set, overwritten by subsequent retarget in
@@ -1377,7 +1401,7 @@ static u32 hv_compose_msi_req_v2(
13771401
int_pkt->wslot.slot = slot;
13781402
int_pkt->int_desc.vector = vector;
13791403
int_pkt->int_desc.vector_count = 1;
1380-
int_pkt->int_desc.delivery_mode = APIC_DELIVERY_MODE_FIXED;
1404+
int_pkt->int_desc.delivery_mode = DELIVERY_MODE;
13811405
cpu = hv_compose_msi_req_get_cpu(affinity);
13821406
int_pkt->int_desc.processor_array[0] =
13831407
hv_cpu_number_to_vp_number(cpu);
@@ -1397,7 +1421,7 @@ static u32 hv_compose_msi_req_v3(
13971421
int_pkt->int_desc.vector = vector;
13981422
int_pkt->int_desc.reserved = 0;
13991423
int_pkt->int_desc.vector_count = 1;
1400-
int_pkt->int_desc.delivery_mode = APIC_DELIVERY_MODE_FIXED;
1424+
int_pkt->int_desc.delivery_mode = DELIVERY_MODE;
14011425
cpu = hv_compose_msi_req_get_cpu(affinity);
14021426
int_pkt->int_desc.processor_array[0] =
14031427
hv_cpu_number_to_vp_number(cpu);
@@ -1419,7 +1443,6 @@ static u32 hv_compose_msi_req_v3(
14191443
*/
14201444
static void hv_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
14211445
{
1422-
struct irq_cfg *cfg = irqd_cfg(data);
14231446
struct hv_pcibus_device *hbus;
14241447
struct vmbus_channel *channel;
14251448
struct hv_pci_dev *hpdev;
@@ -1470,22 +1493,22 @@ static void hv_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
14701493
size = hv_compose_msi_req_v1(&ctxt.int_pkts.v1,
14711494
dest,
14721495
hpdev->desc.win_slot.slot,
1473-
cfg->vector);
1496+
hv_msi_get_int_vector(data));
14741497
break;
14751498

14761499
case PCI_PROTOCOL_VERSION_1_2:
14771500
case PCI_PROTOCOL_VERSION_1_3:
14781501
size = hv_compose_msi_req_v2(&ctxt.int_pkts.v2,
14791502
dest,
14801503
hpdev->desc.win_slot.slot,
1481-
cfg->vector);
1504+
hv_msi_get_int_vector(data));
14821505
break;
14831506

14841507
case PCI_PROTOCOL_VERSION_1_4:
14851508
size = hv_compose_msi_req_v3(&ctxt.int_pkts.v3,
14861509
dest,
14871510
hpdev->desc.win_slot.slot,
1488-
cfg->vector);
1511+
hv_msi_get_int_vector(data));
14891512
break;
14901513

14911514
default:
@@ -1594,14 +1617,14 @@ static void hv_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
15941617
static struct irq_chip hv_msi_irq_chip = {
15951618
.name = "Hyper-V PCIe MSI",
15961619
.irq_compose_msi_msg = hv_compose_msi_msg,
1597-
.irq_set_affinity = hv_set_affinity,
1620+
.irq_set_affinity = irq_chip_set_affinity_parent,
15981621
.irq_ack = irq_chip_ack_parent,
15991622
.irq_mask = hv_irq_mask,
16001623
.irq_unmask = hv_irq_unmask,
16011624
};
16021625

16031626
static struct msi_domain_ops hv_msi_ops = {
1604-
.msi_prepare = pci_msi_prepare,
1627+
.msi_prepare = hv_msi_prepare,
16051628
.msi_free = hv_msi_free,
16061629
};
16071630

@@ -1625,12 +1648,12 @@ static int hv_pcie_init_irq_domain(struct hv_pcibus_device *hbus)
16251648
hbus->msi_info.flags = (MSI_FLAG_USE_DEF_DOM_OPS |
16261649
MSI_FLAG_USE_DEF_CHIP_OPS | MSI_FLAG_MULTI_PCI_MSI |
16271650
MSI_FLAG_PCI_MSIX);
1628-
hbus->msi_info.handler = handle_edge_irq;
1629-
hbus->msi_info.handler_name = "edge";
1651+
hbus->msi_info.handler = FLOW_HANDLER;
1652+
hbus->msi_info.handler_name = FLOW_NAME;
16301653
hbus->msi_info.data = hbus;
16311654
hbus->irq_domain = pci_msi_create_irq_domain(hbus->fwnode,
16321655
&hbus->msi_info,
1633-
x86_vector_domain);
1656+
hv_pci_get_root_domain());
16341657
if (!hbus->irq_domain) {
16351658
dev_err(&hbus->hdev->device,
16361659
"Failed to build an MSI IRQ domain\n");
@@ -3542,9 +3565,15 @@ static void __exit exit_hv_pci_drv(void)
35423565

35433566
static int __init init_hv_pci_drv(void)
35443567
{
3568+
int ret;
3569+
35453570
if (!hv_is_hyperv_initialized())
35463571
return -ENODEV;
35473572

3573+
ret = hv_pci_irqchip_init();
3574+
if (ret)
3575+
return ret;
3576+
35483577
/* Set the invalid domain number's bit, so it will not be used */
35493578
set_bit(HVPCI_DOM_INVALID, hvpci_dom_map);
35503579

include/asm-generic/hyperv-tlfs.h

Lines changed: 0 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -540,39 +540,6 @@ enum hv_interrupt_source {
540540
HV_INTERRUPT_SOURCE_IOAPIC,
541541
};
542542

543-
union hv_msi_address_register {
544-
u32 as_uint32;
545-
struct {
546-
u32 reserved1:2;
547-
u32 destination_mode:1;
548-
u32 redirection_hint:1;
549-
u32 reserved2:8;
550-
u32 destination_id:8;
551-
u32 msi_base:12;
552-
};
553-
} __packed;
554-
555-
union hv_msi_data_register {
556-
u32 as_uint32;
557-
struct {
558-
u32 vector:8;
559-
u32 delivery_mode:3;
560-
u32 reserved1:3;
561-
u32 level_assert:1;
562-
u32 trigger_mode:1;
563-
u32 reserved2:16;
564-
};
565-
} __packed;
566-
567-
/* HvRetargetDeviceInterrupt hypercall */
568-
union hv_msi_entry {
569-
u64 as_uint64;
570-
struct {
571-
union hv_msi_address_register address;
572-
union hv_msi_data_register data;
573-
} __packed;
574-
};
575-
576543
union hv_ioapic_rte {
577544
u64 as_uint64;
578545

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