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| 1 | +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause |
| 2 | +%YAML 1.2 |
| 3 | +--- |
| 4 | +$id: http://devicetree.org/schemas/mmc/hisilicon,hi3798cv200-dw-mshc.yaml# |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | + |
| 7 | +title: Hisilicon Hi3798CV200 SoC specific extensions to the Synopsys DWMMC controller |
| 8 | + |
| 9 | +maintainers: |
| 10 | + |
| 11 | + |
| 12 | +properties: |
| 13 | + compatible: |
| 14 | + enum: |
| 15 | + - hisilicon,hi3798cv200-dw-mshc |
| 16 | + |
| 17 | + reg: |
| 18 | + maxItems: 1 |
| 19 | + |
| 20 | + interrupts: |
| 21 | + maxItems: 1 |
| 22 | + |
| 23 | + clocks: |
| 24 | + items: |
| 25 | + - description: bus interface unit clock |
| 26 | + - description: card interface unit clock |
| 27 | + - description: card input sample phase clock |
| 28 | + - description: controller output drive phase clock |
| 29 | + |
| 30 | + clock-names: |
| 31 | + items: |
| 32 | + - const: ciu |
| 33 | + - const: biu |
| 34 | + - const: ciu-sample |
| 35 | + - const: ciu-drive |
| 36 | + |
| 37 | +required: |
| 38 | + - compatible |
| 39 | + - reg |
| 40 | + - interrupts |
| 41 | + - clocks |
| 42 | + - clock-names |
| 43 | + |
| 44 | +allOf: |
| 45 | + - $ref: synopsys-dw-mshc-common.yaml# |
| 46 | + |
| 47 | +unevaluatedProperties: false |
| 48 | + |
| 49 | +examples: |
| 50 | + - | |
| 51 | + #include <dt-bindings/clock/histb-clock.h> |
| 52 | + #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 53 | +
|
| 54 | + mmc@9830000 { |
| 55 | + compatible = "hisilicon,hi3798cv200-dw-mshc"; |
| 56 | + reg = <0x9830000 0x10000>; |
| 57 | + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; |
| 58 | + clocks = <&crg HISTB_MMC_CIU_CLK>, |
| 59 | + <&crg HISTB_MMC_BIU_CLK>, |
| 60 | + <&crg HISTB_MMC_SAMPLE_CLK>, |
| 61 | + <&crg HISTB_MMC_DRV_CLK>; |
| 62 | + clock-names = "ciu", "biu", "ciu-sample", "ciu-drive"; |
| 63 | + resets = <&crg 0xa0 4>; |
| 64 | + reset-names = "reset"; |
| 65 | + pinctrl-names = "default"; |
| 66 | + pinctrl-0 = <&emmc_pins_1 &emmc_pins_2 |
| 67 | + &emmc_pins_3 &emmc_pins_4>; |
| 68 | + fifo-depth = <256>; |
| 69 | + clock-frequency = <200000000>; |
| 70 | + cap-mmc-highspeed; |
| 71 | + mmc-ddr-1_8v; |
| 72 | + mmc-hs200-1_8v; |
| 73 | + non-removable; |
| 74 | + bus-width = <8>; |
| 75 | + }; |
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