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52 | 52 | #include <asm/io-unit.h>
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53 | 53 | #include <asm/leon.h>
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54 | 54 |
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55 |
| -/* This function must make sure that caches and memory are coherent after DMA |
56 |
| - * On LEON systems without cache snooping it flushes the entire D-CACHE. |
57 |
| - */ |
58 |
| -static inline void dma_make_coherent(unsigned long pa, unsigned long len) |
59 |
| -{ |
60 |
| - if (sparc_cpu_model == sparc_leon) { |
61 |
| - if (!sparc_leon3_snooping_enabled()) |
62 |
| - leon_flush_dcache_all(); |
63 |
| - } |
64 |
| -} |
65 |
| - |
66 | 55 | static void __iomem *_sparc_ioremap(struct resource *res, u32 bus, u32 pa, int sz);
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67 | 56 | static void __iomem *_sparc_alloc_io(unsigned int busno, unsigned long phys,
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68 | 57 | unsigned long size, char *name);
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@@ -365,13 +354,19 @@ void arch_dma_free(struct device *dev, size_t size, void *cpu_addr,
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365 | 354 | free_pages((unsigned long)phys_to_virt(dma_addr), get_order(size));
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366 | 355 | }
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367 | 356 |
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368 |
| -/* IIep is write-through, not flushing on cpu to device transfer. */ |
369 |
| - |
| 357 | +/* |
| 358 | + * IIep is write-through, not flushing on cpu to device transfer. |
| 359 | + * |
| 360 | + * On LEON systems without cache snooping, the entire D-CACHE must be flushed to |
| 361 | + * make DMA to cacheable memory coherent. |
| 362 | + */ |
370 | 363 | void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
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371 | 364 | enum dma_data_direction dir)
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372 | 365 | {
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373 |
| - if (dir != PCI_DMA_TODEVICE) |
374 |
| - dma_make_coherent(paddr, PAGE_ALIGN(size)); |
| 366 | + if (dir != PCI_DMA_TODEVICE && |
| 367 | + sparc_cpu_model == sparc_leon && |
| 368 | + !sparc_leon3_snooping_enabled()) |
| 369 | + leon_flush_dcache_all(); |
375 | 370 | }
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376 | 371 |
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377 | 372 | #ifdef CONFIG_PROC_FS
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