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tanderson-googlealexdeucher
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drm/amd/display: Reduce HDMI pixel encoding if max clock is exceeded
For high-res (8K) or HFR (4K120) displays, using uncompressed pixel formats like YCbCr444 would exceed the bandwidth of HDMI 2.0, so the "interesting" modes would be disabled, leaving only low-res or low framerate modes. This change lowers the pixel encoding to 4:2:2 or 4:2:0 if the max TMDS clock is exceeded. Verified that 8K30 and 4K120 are now available and working with a Samsung Q900R over an HDMI 2.0b link from a Radeon 5700. Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Thomas Anderson <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

Lines changed: 23 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -3356,27 +3356,21 @@ get_output_color_space(const struct dc_crtc_timing *dc_crtc_timing)
33563356
return color_space;
33573357
}
33583358

3359-
static void reduce_mode_colour_depth(struct dc_crtc_timing *timing_out)
3360-
{
3361-
if (timing_out->display_color_depth <= COLOR_DEPTH_888)
3362-
return;
3363-
3364-
timing_out->display_color_depth--;
3365-
}
3366-
3367-
static void adjust_colour_depth_from_display_info(struct dc_crtc_timing *timing_out,
3368-
const struct drm_display_info *info)
3359+
static bool adjust_colour_depth_from_display_info(
3360+
struct dc_crtc_timing *timing_out,
3361+
const struct drm_display_info *info)
33693362
{
3363+
enum dc_color_depth depth = timing_out->display_color_depth;
33703364
int normalized_clk;
3371-
if (timing_out->display_color_depth <= COLOR_DEPTH_888)
3372-
return;
33733365
do {
33743366
normalized_clk = timing_out->pix_clk_100hz / 10;
33753367
/* YCbCr 4:2:0 requires additional adjustment of 1/2 */
33763368
if (timing_out->pixel_encoding == PIXEL_ENCODING_YCBCR420)
33773369
normalized_clk /= 2;
33783370
/* Adjusting pix clock following on HDMI spec based on colour depth */
3379-
switch (timing_out->display_color_depth) {
3371+
switch (depth) {
3372+
case COLOR_DEPTH_888:
3373+
break;
33803374
case COLOR_DEPTH_101010:
33813375
normalized_clk = (normalized_clk * 30) / 24;
33823376
break;
@@ -3387,14 +3381,15 @@ static void adjust_colour_depth_from_display_info(struct dc_crtc_timing *timing_
33873381
normalized_clk = (normalized_clk * 48) / 24;
33883382
break;
33893383
default:
3390-
return;
3384+
/* The above depths are the only ones valid for HDMI. */
3385+
return false;
33913386
}
3392-
if (normalized_clk <= info->max_tmds_clock)
3393-
return;
3394-
reduce_mode_colour_depth(timing_out);
3395-
3396-
} while (timing_out->display_color_depth > COLOR_DEPTH_888);
3397-
3387+
if (normalized_clk <= info->max_tmds_clock) {
3388+
timing_out->display_color_depth = depth;
3389+
return true;
3390+
}
3391+
} while (--depth > COLOR_DEPTH_666);
3392+
return false;
33983393
}
33993394

34003395
static void fill_stream_properties_from_drm_display_mode(
@@ -3474,8 +3469,14 @@ static void fill_stream_properties_from_drm_display_mode(
34743469

34753470
stream->out_transfer_func->type = TF_TYPE_PREDEFINED;
34763471
stream->out_transfer_func->tf = TRANSFER_FUNCTION_SRGB;
3477-
if (stream->signal == SIGNAL_TYPE_HDMI_TYPE_A)
3478-
adjust_colour_depth_from_display_info(timing_out, info);
3472+
if (stream->signal == SIGNAL_TYPE_HDMI_TYPE_A) {
3473+
if (!adjust_colour_depth_from_display_info(timing_out, info) &&
3474+
drm_mode_is_420_also(info, mode_in) &&
3475+
timing_out->pixel_encoding != PIXEL_ENCODING_YCBCR420) {
3476+
timing_out->pixel_encoding = PIXEL_ENCODING_YCBCR420;
3477+
adjust_colour_depth_from_display_info(timing_out, info);
3478+
}
3479+
}
34793480
}
34803481

34813482
static void fill_audio_info(struct audio_info *audio_info,

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