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1 | 1 | /* SPDX-License-Identifier: GPL-2.0-only */
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2 | 2 | /*
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3 | 3 | * Copyright (C) 2015 Regents of the University of California
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| 4 | + * Copyright (c) 2020 Western Digital Corporation or its affiliates. |
4 | 5 | */
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5 | 6 |
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6 | 7 | #ifndef _ASM_RISCV_SBI_H
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9 | 10 | #include <linux/types.h>
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10 | 11 |
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11 | 12 | #ifdef CONFIG_RISCV_SBI
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12 |
| -#define SBI_SET_TIMER 0 |
13 |
| -#define SBI_CONSOLE_PUTCHAR 1 |
14 |
| -#define SBI_CONSOLE_GETCHAR 2 |
15 |
| -#define SBI_CLEAR_IPI 3 |
16 |
| -#define SBI_SEND_IPI 4 |
17 |
| -#define SBI_REMOTE_FENCE_I 5 |
18 |
| -#define SBI_REMOTE_SFENCE_VMA 6 |
19 |
| -#define SBI_REMOTE_SFENCE_VMA_ASID 7 |
20 |
| -#define SBI_SHUTDOWN 8 |
| 13 | +#define SBI_EXT_0_1_SET_TIMER 0x0 |
| 14 | +#define SBI_EXT_0_1_CONSOLE_PUTCHAR 0x1 |
| 15 | +#define SBI_EXT_0_1_CONSOLE_GETCHAR 0x2 |
| 16 | +#define SBI_EXT_0_1_CLEAR_IPI 0x3 |
| 17 | +#define SBI_EXT_0_1_SEND_IPI 0x4 |
| 18 | +#define SBI_EXT_0_1_REMOTE_FENCE_I 0x5 |
| 19 | +#define SBI_EXT_0_1_REMOTE_SFENCE_VMA 0x6 |
| 20 | +#define SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID 0x7 |
| 21 | +#define SBI_EXT_0_1_SHUTDOWN 0x8 |
21 | 22 |
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22 | 23 | #define SBI_CALL(which, arg0, arg1, arg2, arg3) ({ \
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23 | 24 | register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0); \
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43 | 44 |
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44 | 45 | static inline void sbi_console_putchar(int ch)
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45 | 46 | {
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46 |
| - SBI_CALL_1(SBI_CONSOLE_PUTCHAR, ch); |
| 47 | + SBI_CALL_1(SBI_EXT_0_1_CONSOLE_PUTCHAR, ch); |
47 | 48 | }
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48 | 49 |
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49 | 50 | static inline int sbi_console_getchar(void)
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50 | 51 | {
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51 |
| - return SBI_CALL_0(SBI_CONSOLE_GETCHAR); |
| 52 | + return SBI_CALL_0(SBI_EXT_0_1_CONSOLE_GETCHAR); |
52 | 53 | }
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53 | 54 |
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54 | 55 | static inline void sbi_set_timer(uint64_t stime_value)
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55 | 56 | {
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56 | 57 | #if __riscv_xlen == 32
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57 |
| - SBI_CALL_2(SBI_SET_TIMER, stime_value, stime_value >> 32); |
| 58 | + SBI_CALL_2(SBI_EXT_0_1_SET_TIMER, stime_value, |
| 59 | + stime_value >> 32); |
58 | 60 | #else
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59 |
| - SBI_CALL_1(SBI_SET_TIMER, stime_value); |
| 61 | + SBI_CALL_1(SBI_EXT_0_1_SET_TIMER, stime_value); |
60 | 62 | #endif
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61 | 63 | }
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62 | 64 |
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63 | 65 | static inline void sbi_shutdown(void)
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64 | 66 | {
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65 |
| - SBI_CALL_0(SBI_SHUTDOWN); |
| 67 | + SBI_CALL_0(SBI_EXT_0_1_SHUTDOWN); |
66 | 68 | }
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67 | 69 |
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68 | 70 | static inline void sbi_clear_ipi(void)
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69 | 71 | {
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70 |
| - SBI_CALL_0(SBI_CLEAR_IPI); |
| 72 | + SBI_CALL_0(SBI_EXT_0_1_CLEAR_IPI); |
71 | 73 | }
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72 | 74 |
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73 | 75 | static inline void sbi_send_ipi(const unsigned long *hart_mask)
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74 | 76 | {
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75 |
| - SBI_CALL_1(SBI_SEND_IPI, hart_mask); |
| 77 | + SBI_CALL_1(SBI_EXT_0_1_SEND_IPI, hart_mask); |
76 | 78 | }
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77 | 79 |
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78 | 80 | static inline void sbi_remote_fence_i(const unsigned long *hart_mask)
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79 | 81 | {
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80 |
| - SBI_CALL_1(SBI_REMOTE_FENCE_I, hart_mask); |
| 82 | + SBI_CALL_1(SBI_EXT_0_1_REMOTE_FENCE_I, hart_mask); |
81 | 83 | }
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82 | 84 |
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83 | 85 | static inline void sbi_remote_sfence_vma(const unsigned long *hart_mask,
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84 | 86 | unsigned long start,
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85 | 87 | unsigned long size)
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86 | 88 | {
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87 |
| - SBI_CALL_3(SBI_REMOTE_SFENCE_VMA, hart_mask, start, size); |
| 89 | + SBI_CALL_3(SBI_EXT_0_1_REMOTE_SFENCE_VMA, hart_mask, start, size); |
88 | 90 | }
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89 | 91 |
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90 | 92 | static inline void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
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91 | 93 | unsigned long start,
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92 | 94 | unsigned long size,
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93 | 95 | unsigned long asid)
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94 | 96 | {
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95 |
| - SBI_CALL_4(SBI_REMOTE_SFENCE_VMA_ASID, hart_mask, start, size, asid); |
| 97 | + SBI_CALL_4(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, hart_mask, |
| 98 | + start, size, asid); |
96 | 99 | }
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97 | 100 | #else /* CONFIG_RISCV_SBI */
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98 | 101 | /* stubs for code that is only reachable under IS_ENABLED(CONFIG_RISCV_SBI): */
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