Skip to content

Commit 8446923

Browse files
atishp04palmer-dabbelt
authored andcommitted
RISC-V: Mark existing SBI as 0.1 SBI.
As per the new SBI specification, current SBI implementation version is defined as 0.1 and will be removed/replaced in future. Each of the function call in 0.1 is defined as a separate extension which makes easier to replace them one at a time. Rename existing implementation to reflect that. This patch is just a preparatory patch for SBI v0.2 and doesn't introduce any functional changes. Signed-off-by: Atish Patra <[email protected]> Reviewed-by: Anup Patel <[email protected]> Reviewed-by: Palmer Dabbelt <[email protected]> Signed-off-by: Palmer Dabbelt <[email protected]>
1 parent 88d1103 commit 8446923

File tree

1 file changed

+22
-19
lines changed
  • arch/riscv/include/asm

1 file changed

+22
-19
lines changed

arch/riscv/include/asm/sbi.h

Lines changed: 22 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,7 @@
11
/* SPDX-License-Identifier: GPL-2.0-only */
22
/*
33
* Copyright (C) 2015 Regents of the University of California
4+
* Copyright (c) 2020 Western Digital Corporation or its affiliates.
45
*/
56

67
#ifndef _ASM_RISCV_SBI_H
@@ -9,15 +10,15 @@
910
#include <linux/types.h>
1011

1112
#ifdef CONFIG_RISCV_SBI
12-
#define SBI_SET_TIMER 0
13-
#define SBI_CONSOLE_PUTCHAR 1
14-
#define SBI_CONSOLE_GETCHAR 2
15-
#define SBI_CLEAR_IPI 3
16-
#define SBI_SEND_IPI 4
17-
#define SBI_REMOTE_FENCE_I 5
18-
#define SBI_REMOTE_SFENCE_VMA 6
19-
#define SBI_REMOTE_SFENCE_VMA_ASID 7
20-
#define SBI_SHUTDOWN 8
13+
#define SBI_EXT_0_1_SET_TIMER 0x0
14+
#define SBI_EXT_0_1_CONSOLE_PUTCHAR 0x1
15+
#define SBI_EXT_0_1_CONSOLE_GETCHAR 0x2
16+
#define SBI_EXT_0_1_CLEAR_IPI 0x3
17+
#define SBI_EXT_0_1_SEND_IPI 0x4
18+
#define SBI_EXT_0_1_REMOTE_FENCE_I 0x5
19+
#define SBI_EXT_0_1_REMOTE_SFENCE_VMA 0x6
20+
#define SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID 0x7
21+
#define SBI_EXT_0_1_SHUTDOWN 0x8
2122

2223
#define SBI_CALL(which, arg0, arg1, arg2, arg3) ({ \
2324
register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0); \
@@ -43,56 +44,58 @@
4344

4445
static inline void sbi_console_putchar(int ch)
4546
{
46-
SBI_CALL_1(SBI_CONSOLE_PUTCHAR, ch);
47+
SBI_CALL_1(SBI_EXT_0_1_CONSOLE_PUTCHAR, ch);
4748
}
4849

4950
static inline int sbi_console_getchar(void)
5051
{
51-
return SBI_CALL_0(SBI_CONSOLE_GETCHAR);
52+
return SBI_CALL_0(SBI_EXT_0_1_CONSOLE_GETCHAR);
5253
}
5354

5455
static inline void sbi_set_timer(uint64_t stime_value)
5556
{
5657
#if __riscv_xlen == 32
57-
SBI_CALL_2(SBI_SET_TIMER, stime_value, stime_value >> 32);
58+
SBI_CALL_2(SBI_EXT_0_1_SET_TIMER, stime_value,
59+
stime_value >> 32);
5860
#else
59-
SBI_CALL_1(SBI_SET_TIMER, stime_value);
61+
SBI_CALL_1(SBI_EXT_0_1_SET_TIMER, stime_value);
6062
#endif
6163
}
6264

6365
static inline void sbi_shutdown(void)
6466
{
65-
SBI_CALL_0(SBI_SHUTDOWN);
67+
SBI_CALL_0(SBI_EXT_0_1_SHUTDOWN);
6668
}
6769

6870
static inline void sbi_clear_ipi(void)
6971
{
70-
SBI_CALL_0(SBI_CLEAR_IPI);
72+
SBI_CALL_0(SBI_EXT_0_1_CLEAR_IPI);
7173
}
7274

7375
static inline void sbi_send_ipi(const unsigned long *hart_mask)
7476
{
75-
SBI_CALL_1(SBI_SEND_IPI, hart_mask);
77+
SBI_CALL_1(SBI_EXT_0_1_SEND_IPI, hart_mask);
7678
}
7779

7880
static inline void sbi_remote_fence_i(const unsigned long *hart_mask)
7981
{
80-
SBI_CALL_1(SBI_REMOTE_FENCE_I, hart_mask);
82+
SBI_CALL_1(SBI_EXT_0_1_REMOTE_FENCE_I, hart_mask);
8183
}
8284

8385
static inline void sbi_remote_sfence_vma(const unsigned long *hart_mask,
8486
unsigned long start,
8587
unsigned long size)
8688
{
87-
SBI_CALL_3(SBI_REMOTE_SFENCE_VMA, hart_mask, start, size);
89+
SBI_CALL_3(SBI_EXT_0_1_REMOTE_SFENCE_VMA, hart_mask, start, size);
8890
}
8991

9092
static inline void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
9193
unsigned long start,
9294
unsigned long size,
9395
unsigned long asid)
9496
{
95-
SBI_CALL_4(SBI_REMOTE_SFENCE_VMA_ASID, hart_mask, start, size, asid);
97+
SBI_CALL_4(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, hart_mask,
98+
start, size, asid);
9699
}
97100
#else /* CONFIG_RISCV_SBI */
98101
/* stubs for code that is only reachable under IS_ENABLED(CONFIG_RISCV_SBI): */

0 commit comments

Comments
 (0)