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can: bxcan: add support for single peripheral configuration
Add support for bxCAN controller in single peripheral configuration: - primary bxCAN - dedicated Memory Access Controller unit - 512-byte SRAM memory - 14 filter banks Signed-off-by: Dario Binacchi <[email protected]> Link: https://lore.kernel.org/all/[email protected] Signed-off-by: Marc Kleine-Budde <[email protected]>
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drivers/net/can/bxcan.c

Lines changed: 23 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -118,7 +118,7 @@
118118
#define BXCAN_FiR1_REG(b) (0x40 + (b) * 8)
119119
#define BXCAN_FiR2_REG(b) (0x44 + (b) * 8)
120120

121-
#define BXCAN_FILTER_ID(primary) (primary ? 0 : 14)
121+
#define BXCAN_FILTER_ID(cfg) ((cfg) == BXCAN_CFG_DUAL_SECONDARY ? 14 : 0)
122122

123123
/* Filter primary register (FMR) bits */
124124
#define BXCAN_FMR_CANSB_MASK GENMASK(13, 8)
@@ -135,6 +135,12 @@ enum bxcan_lec_code {
135135
BXCAN_LEC_UNUSED
136136
};
137137

138+
enum bxcan_cfg {
139+
BXCAN_CFG_SINGLE = 0,
140+
BXCAN_CFG_DUAL_PRIMARY,
141+
BXCAN_CFG_DUAL_SECONDARY
142+
};
143+
138144
/* Structure of the message buffer */
139145
struct bxcan_mb {
140146
u32 id; /* can identifier */
@@ -167,7 +173,7 @@ struct bxcan_priv {
167173
struct regmap *gcan;
168174
int tx_irq;
169175
int sce_irq;
170-
bool primary;
176+
enum bxcan_cfg cfg;
171177
struct clk *clk;
172178
spinlock_t rmw_lock; /* lock for read-modify-write operations */
173179
unsigned int tx_head;
@@ -202,17 +208,17 @@ static inline void bxcan_rmw(struct bxcan_priv *priv, void __iomem *addr,
202208
spin_unlock_irqrestore(&priv->rmw_lock, flags);
203209
}
204210

205-
static void bxcan_disable_filters(struct bxcan_priv *priv, bool primary)
211+
static void bxcan_disable_filters(struct bxcan_priv *priv, enum bxcan_cfg cfg)
206212
{
207-
unsigned int fid = BXCAN_FILTER_ID(primary);
213+
unsigned int fid = BXCAN_FILTER_ID(cfg);
208214
u32 fmask = BIT(fid);
209215

210216
regmap_update_bits(priv->gcan, BXCAN_FA1R_REG, fmask, 0);
211217
}
212218

213-
static void bxcan_enable_filters(struct bxcan_priv *priv, bool primary)
219+
static void bxcan_enable_filters(struct bxcan_priv *priv, enum bxcan_cfg cfg)
214220
{
215-
unsigned int fid = BXCAN_FILTER_ID(primary);
221+
unsigned int fid = BXCAN_FILTER_ID(cfg);
216222
u32 fmask = BIT(fid);
217223

218224
/* Filter settings:
@@ -680,7 +686,7 @@ static int bxcan_chip_start(struct net_device *ndev)
680686
BXCAN_BTR_BRP_MASK | BXCAN_BTR_TS1_MASK | BXCAN_BTR_TS2_MASK |
681687
BXCAN_BTR_SJW_MASK, set);
682688

683-
bxcan_enable_filters(priv, priv->primary);
689+
bxcan_enable_filters(priv, priv->cfg);
684690

685691
/* Clear all internal status */
686692
priv->tx_head = 0;
@@ -806,7 +812,7 @@ static void bxcan_chip_stop(struct net_device *ndev)
806812
BXCAN_IER_EPVIE | BXCAN_IER_EWGIE | BXCAN_IER_FOVIE1 |
807813
BXCAN_IER_FFIE1 | BXCAN_IER_FMPIE1 | BXCAN_IER_FOVIE0 |
808814
BXCAN_IER_FFIE0 | BXCAN_IER_FMPIE0 | BXCAN_IER_TMEIE, 0);
809-
bxcan_disable_filters(priv, priv->primary);
815+
bxcan_disable_filters(priv, priv->cfg);
810816
bxcan_enter_sleep_mode(priv);
811817
priv->can.state = CAN_STATE_STOPPED;
812818
}
@@ -931,7 +937,7 @@ static int bxcan_probe(struct platform_device *pdev)
931937
struct clk *clk = NULL;
932938
void __iomem *regs;
933939
struct regmap *gcan;
934-
bool primary;
940+
enum bxcan_cfg cfg;
935941
int err, rx_irq, tx_irq, sce_irq;
936942

937943
regs = devm_platform_ioremap_resource(pdev, 0);
@@ -946,7 +952,13 @@ static int bxcan_probe(struct platform_device *pdev)
946952
return PTR_ERR(gcan);
947953
}
948954

949-
primary = of_property_read_bool(np, "st,can-primary");
955+
if (of_property_read_bool(np, "st,can-primary"))
956+
cfg = BXCAN_CFG_DUAL_PRIMARY;
957+
else if (of_property_read_bool(np, "st,can-secondary"))
958+
cfg = BXCAN_CFG_DUAL_SECONDARY;
959+
else
960+
cfg = BXCAN_CFG_SINGLE;
961+
950962
clk = devm_clk_get(dev, NULL);
951963
if (IS_ERR(clk)) {
952964
dev_err(dev, "failed to get clock\n");
@@ -992,7 +1004,7 @@ static int bxcan_probe(struct platform_device *pdev)
9921004
priv->clk = clk;
9931005
priv->tx_irq = tx_irq;
9941006
priv->sce_irq = sce_irq;
995-
priv->primary = primary;
1007+
priv->cfg = cfg;
9961008
priv->can.clock.freq = clk_get_rate(clk);
9971009
spin_lock_init(&priv->rmw_lock);
9981010
priv->tx_head = 0;

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