Skip to content

Commit 892713e

Browse files
Zenghui YuMarc Zyngier
authored andcommitted
KVM: arm64: Sidestep stage2_unmap_vm() on vcpu reset when S2FWB is supported
stage2_unmap_vm() was introduced to unmap user RAM region in the stage2 page table to make the caches coherent. E.g., a guest reboot with stage1 MMU disabled will access memory using non-cacheable attributes. If the RAM and caches are not coherent at this stage, some evicted dirty cache line may go and corrupt guest data in RAM. Since ARMv8.4, S2FWB feature is mandatory and KVM will take advantage of it to configure the stage2 page table and the attributes of memory access. So we ensure that guests always access memory using cacheable attributes and thus, the caches always be coherent. So on CPUs that support S2FWB, we can safely reset the vcpu without a heavy stage2 unmapping. Signed-off-by: Zenghui Yu <[email protected]> Signed-off-by: Marc Zyngier <[email protected]> Link: https://lore.kernel.org/r/[email protected]
1 parent 656012c commit 892713e

File tree

1 file changed

+4
-1
lines changed

1 file changed

+4
-1
lines changed

arch/arm64/kvm/arm.c

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -983,8 +983,11 @@ static int kvm_arch_vcpu_ioctl_vcpu_init(struct kvm_vcpu *vcpu,
983983
/*
984984
* Ensure a rebooted VM will fault in RAM pages and detect if the
985985
* guest MMU is turned off and flush the caches as needed.
986+
*
987+
* S2FWB enforces all memory accesses to RAM being cacheable, we
988+
* ensure that the cache is always coherent.
986989
*/
987-
if (vcpu->arch.has_run_once)
990+
if (vcpu->arch.has_run_once && !cpus_have_const_cap(ARM64_HAS_STAGE2_FWB))
988991
stage2_unmap_vm(vcpu->kvm);
989992

990993
vcpu_reset_hcr(vcpu);

0 commit comments

Comments
 (0)