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lines changed Original file line number Diff line number Diff line change 12
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#include <uapi/asm/hwcap.h>
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#ifndef __ASSEMBLY__
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+ #include <linux/jump_label.h>
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/*
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* This yields a mask that user programs can use to figure out what
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* instruction set this cpu supports.
@@ -56,13 +57,37 @@ enum riscv_isa_ext_id {
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RISCV_ISA_EXT_ID_MAX = RISCV_ISA_EXT_MAX ,
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};
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+ /*
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+ * This enum represents the logical ID for each RISC-V ISA extension static
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+ * keys. We can use static key to optimize code path if some ISA extensions
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+ * are available.
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+ */
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+ enum riscv_isa_ext_key {
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+ RISCV_ISA_EXT_KEY_FPU , /* For 'F' and 'D' */
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+ RISCV_ISA_EXT_KEY_MAX ,
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+ };
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+
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struct riscv_isa_ext_data {
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/* Name of the extension displayed to userspace via /proc/cpuinfo */
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char uprop [RISCV_ISA_EXT_NAME_LEN_MAX ];
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/* The logical ISA extension ID */
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unsigned int isa_ext_id ;
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};
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+ extern struct static_key_false riscv_isa_ext_keys [RISCV_ISA_EXT_KEY_MAX ];
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+
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+ static __always_inline int riscv_isa_ext2key (int num )
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+ {
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+ switch (num ) {
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+ case RISCV_ISA_EXT_f :
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+ return RISCV_ISA_EXT_KEY_FPU ;
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+ case RISCV_ISA_EXT_d :
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+ return RISCV_ISA_EXT_KEY_FPU ;
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+ default :
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+ return - EINVAL ;
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+ }
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+ }
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+
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unsigned long riscv_isa_extension_base (const unsigned long * isa_bitmap );
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#define riscv_isa_extension_mask (ext ) BIT_MASK(RISCV_ISA_EXT_##ext)
Original file line number Diff line number Diff line change 8
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#include <linux/jump_label.h>
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#include <linux/sched/task_stack.h>
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+ #include <asm/hwcap.h>
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#include <asm/processor.h>
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#include <asm/ptrace.h>
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#include <asm/csr.h>
@@ -56,10 +57,9 @@ static inline void __switch_to_aux(struct task_struct *prev,
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fstate_restore (next , task_pt_regs (next ));
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}
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- extern struct static_key_false cpu_hwcap_fpu ;
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static __always_inline bool has_fpu (void )
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{
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- return static_branch_likely (& cpu_hwcap_fpu );
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+ return static_branch_likely (& riscv_isa_ext_keys [ RISCV_ISA_EXT_KEY_FPU ] );
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}
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#else
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static __always_inline bool has_fpu (void ) { return false; }
Original file line number Diff line number Diff line change @@ -27,9 +27,8 @@ unsigned long elf_hwcap __read_mostly;
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/* Host ISA bitmap */
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static DECLARE_BITMAP (riscv_isa , RISCV_ISA_EXT_MAX ) __read_mostly ;
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- #ifdef CONFIG_FPU
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- __ro_after_init DEFINE_STATIC_KEY_FALSE (cpu_hwcap_fpu );
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- #endif
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+ __ro_after_init DEFINE_STATIC_KEY_ARRAY_FALSE (riscv_isa_ext_keys , RISCV_ISA_EXT_KEY_MAX );
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+ EXPORT_SYMBOL (riscv_isa_ext_keys );
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/**
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* riscv_isa_extension_base() - Get base extension word
@@ -238,10 +237,11 @@ void __init riscv_fill_hwcap(void)
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print_str [j ++ ] = (char )('a' + i );
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pr_info ("riscv: ELF capabilities %s\n" , print_str );
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- #ifdef CONFIG_FPU
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- if (elf_hwcap & (COMPAT_HWCAP_ISA_F | COMPAT_HWCAP_ISA_D ))
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- static_branch_enable (& cpu_hwcap_fpu );
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- #endif
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+ for_each_set_bit (i , riscv_isa , RISCV_ISA_EXT_MAX ) {
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+ j = riscv_isa_ext2key (i );
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+ if (j >= 0 )
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+ static_branch_enable (& riscv_isa_ext_keys [j ]);
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+ }
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}
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#ifdef CONFIG_RISCV_ALTERNATIVE
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