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30 | 30 | #include <linux/platform_device.h>
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31 | 31 | #include <linux/spinlock.h>
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32 | 32 |
|
33 |
| -#define SHA_BUFFER_LEN PAGE_SIZE |
34 |
| -#define SAHARA_MAX_SHA_BLOCK_SIZE SHA256_BLOCK_SIZE |
35 |
| - |
36 |
| -#define SAHARA_NAME "sahara" |
37 |
| -#define SAHARA_VERSION_3 3 |
38 |
| -#define SAHARA_VERSION_4 4 |
39 |
| -#define SAHARA_TIMEOUT_MS 1000 |
40 |
| -#define SAHARA_MAX_HW_DESC 2 |
41 |
| -#define SAHARA_MAX_HW_LINK 20 |
42 |
| - |
43 |
| -#define FLAGS_MODE_MASK 0x000f |
44 |
| -#define FLAGS_ENCRYPT BIT(0) |
45 |
| -#define FLAGS_CBC BIT(1) |
46 |
| - |
47 |
| -#define SAHARA_HDR_BASE 0x00800000 |
48 |
| -#define SAHARA_HDR_SKHA_ALG_AES 0 |
49 |
| -#define SAHARA_HDR_SKHA_OP_ENC (1 << 2) |
50 |
| -#define SAHARA_HDR_SKHA_MODE_ECB (0 << 3) |
51 |
| -#define SAHARA_HDR_SKHA_MODE_CBC (1 << 3) |
52 |
| -#define SAHARA_HDR_FORM_DATA (5 << 16) |
53 |
| -#define SAHARA_HDR_FORM_KEY (8 << 16) |
54 |
| -#define SAHARA_HDR_LLO (1 << 24) |
55 |
| -#define SAHARA_HDR_CHA_SKHA (1 << 28) |
56 |
| -#define SAHARA_HDR_CHA_MDHA (2 << 28) |
57 |
| -#define SAHARA_HDR_PARITY_BIT (1 << 31) |
58 |
| - |
59 |
| -#define SAHARA_HDR_MDHA_SET_MODE_MD_KEY 0x20880000 |
60 |
| -#define SAHARA_HDR_MDHA_SET_MODE_HASH 0x208D0000 |
61 |
| -#define SAHARA_HDR_MDHA_HASH 0xA0850000 |
62 |
| -#define SAHARA_HDR_MDHA_STORE_DIGEST 0x20820000 |
63 |
| -#define SAHARA_HDR_MDHA_ALG_SHA1 0 |
64 |
| -#define SAHARA_HDR_MDHA_ALG_MD5 1 |
65 |
| -#define SAHARA_HDR_MDHA_ALG_SHA256 2 |
66 |
| -#define SAHARA_HDR_MDHA_ALG_SHA224 3 |
67 |
| -#define SAHARA_HDR_MDHA_PDATA (1 << 2) |
68 |
| -#define SAHARA_HDR_MDHA_HMAC (1 << 3) |
69 |
| -#define SAHARA_HDR_MDHA_INIT (1 << 5) |
70 |
| -#define SAHARA_HDR_MDHA_IPAD (1 << 6) |
71 |
| -#define SAHARA_HDR_MDHA_OPAD (1 << 7) |
72 |
| -#define SAHARA_HDR_MDHA_SWAP (1 << 8) |
73 |
| -#define SAHARA_HDR_MDHA_MAC_FULL (1 << 9) |
74 |
| -#define SAHARA_HDR_MDHA_SSL (1 << 10) |
| 33 | +#define SHA_BUFFER_LEN PAGE_SIZE |
| 34 | +#define SAHARA_MAX_SHA_BLOCK_SIZE SHA256_BLOCK_SIZE |
| 35 | + |
| 36 | +#define SAHARA_NAME "sahara" |
| 37 | +#define SAHARA_VERSION_3 3 |
| 38 | +#define SAHARA_VERSION_4 4 |
| 39 | +#define SAHARA_TIMEOUT_MS 1000 |
| 40 | +#define SAHARA_MAX_HW_DESC 2 |
| 41 | +#define SAHARA_MAX_HW_LINK 20 |
| 42 | + |
| 43 | +#define FLAGS_MODE_MASK 0x000f |
| 44 | +#define FLAGS_ENCRYPT BIT(0) |
| 45 | +#define FLAGS_CBC BIT(1) |
| 46 | + |
| 47 | +#define SAHARA_HDR_BASE 0x00800000 |
| 48 | +#define SAHARA_HDR_SKHA_ALG_AES 0 |
| 49 | +#define SAHARA_HDR_SKHA_OP_ENC (1 << 2) |
| 50 | +#define SAHARA_HDR_SKHA_MODE_ECB (0 << 3) |
| 51 | +#define SAHARA_HDR_SKHA_MODE_CBC (1 << 3) |
| 52 | +#define SAHARA_HDR_FORM_DATA (5 << 16) |
| 53 | +#define SAHARA_HDR_FORM_KEY (8 << 16) |
| 54 | +#define SAHARA_HDR_LLO (1 << 24) |
| 55 | +#define SAHARA_HDR_CHA_SKHA (1 << 28) |
| 56 | +#define SAHARA_HDR_CHA_MDHA (2 << 28) |
| 57 | +#define SAHARA_HDR_PARITY_BIT (1 << 31) |
| 58 | + |
| 59 | +#define SAHARA_HDR_MDHA_SET_MODE_MD_KEY 0x20880000 |
| 60 | +#define SAHARA_HDR_MDHA_SET_MODE_HASH 0x208D0000 |
| 61 | +#define SAHARA_HDR_MDHA_HASH 0xA0850000 |
| 62 | +#define SAHARA_HDR_MDHA_STORE_DIGEST 0x20820000 |
| 63 | +#define SAHARA_HDR_MDHA_ALG_SHA1 0 |
| 64 | +#define SAHARA_HDR_MDHA_ALG_MD5 1 |
| 65 | +#define SAHARA_HDR_MDHA_ALG_SHA256 2 |
| 66 | +#define SAHARA_HDR_MDHA_ALG_SHA224 3 |
| 67 | +#define SAHARA_HDR_MDHA_PDATA (1 << 2) |
| 68 | +#define SAHARA_HDR_MDHA_HMAC (1 << 3) |
| 69 | +#define SAHARA_HDR_MDHA_INIT (1 << 5) |
| 70 | +#define SAHARA_HDR_MDHA_IPAD (1 << 6) |
| 71 | +#define SAHARA_HDR_MDHA_OPAD (1 << 7) |
| 72 | +#define SAHARA_HDR_MDHA_SWAP (1 << 8) |
| 73 | +#define SAHARA_HDR_MDHA_MAC_FULL (1 << 9) |
| 74 | +#define SAHARA_HDR_MDHA_SSL (1 << 10) |
75 | 75 |
|
76 | 76 | /* SAHARA can only process one request at a time */
|
77 |
| -#define SAHARA_QUEUE_LENGTH 1 |
78 |
| - |
79 |
| -#define SAHARA_REG_VERSION 0x00 |
80 |
| -#define SAHARA_REG_DAR 0x04 |
81 |
| -#define SAHARA_REG_CONTROL 0x08 |
82 |
| -#define SAHARA_CONTROL_SET_THROTTLE(x) (((x) & 0xff) << 24) |
83 |
| -#define SAHARA_CONTROL_SET_MAXBURST(x) (((x) & 0xff) << 16) |
84 |
| -#define SAHARA_CONTROL_RNG_AUTORSD (1 << 7) |
85 |
| -#define SAHARA_CONTROL_ENABLE_INT (1 << 4) |
86 |
| -#define SAHARA_REG_CMD 0x0C |
87 |
| -#define SAHARA_CMD_RESET (1 << 0) |
88 |
| -#define SAHARA_CMD_CLEAR_INT (1 << 8) |
89 |
| -#define SAHARA_CMD_CLEAR_ERR (1 << 9) |
90 |
| -#define SAHARA_CMD_SINGLE_STEP (1 << 10) |
91 |
| -#define SAHARA_CMD_MODE_BATCH (1 << 16) |
92 |
| -#define SAHARA_CMD_MODE_DEBUG (1 << 18) |
93 |
| -#define SAHARA_REG_STATUS 0x10 |
94 |
| -#define SAHARA_STATUS_GET_STATE(x) ((x) & 0x7) |
95 |
| -#define SAHARA_STATE_IDLE 0 |
96 |
| -#define SAHARA_STATE_BUSY 1 |
97 |
| -#define SAHARA_STATE_ERR 2 |
98 |
| -#define SAHARA_STATE_FAULT 3 |
99 |
| -#define SAHARA_STATE_COMPLETE 4 |
100 |
| -#define SAHARA_STATE_COMP_FLAG (1 << 2) |
101 |
| -#define SAHARA_STATUS_DAR_FULL (1 << 3) |
102 |
| -#define SAHARA_STATUS_ERROR (1 << 4) |
103 |
| -#define SAHARA_STATUS_SECURE (1 << 5) |
104 |
| -#define SAHARA_STATUS_FAIL (1 << 6) |
105 |
| -#define SAHARA_STATUS_INIT (1 << 7) |
106 |
| -#define SAHARA_STATUS_RNG_RESEED (1 << 8) |
107 |
| -#define SAHARA_STATUS_ACTIVE_RNG (1 << 9) |
108 |
| -#define SAHARA_STATUS_ACTIVE_MDHA (1 << 10) |
109 |
| -#define SAHARA_STATUS_ACTIVE_SKHA (1 << 11) |
110 |
| -#define SAHARA_STATUS_MODE_BATCH (1 << 16) |
111 |
| -#define SAHARA_STATUS_MODE_DEDICATED (1 << 17) |
112 |
| -#define SAHARA_STATUS_MODE_DEBUG (1 << 18) |
113 |
| -#define SAHARA_STATUS_GET_ISTATE(x) (((x) >> 24) & 0xff) |
114 |
| -#define SAHARA_REG_ERRSTATUS 0x14 |
115 |
| -#define SAHARA_ERRSTATUS_GET_SOURCE(x) ((x) & 0xf) |
116 |
| -#define SAHARA_ERRSOURCE_CHA 14 |
117 |
| -#define SAHARA_ERRSOURCE_DMA 15 |
118 |
| -#define SAHARA_ERRSTATUS_DMA_DIR (1 << 8) |
119 |
| -#define SAHARA_ERRSTATUS_GET_DMASZ(x)(((x) >> 9) & 0x3) |
120 |
| -#define SAHARA_ERRSTATUS_GET_DMASRC(x) (((x) >> 13) & 0x7) |
121 |
| -#define SAHARA_ERRSTATUS_GET_CHASRC(x) (((x) >> 16) & 0xfff) |
122 |
| -#define SAHARA_ERRSTATUS_GET_CHAERR(x) (((x) >> 28) & 0x3) |
123 |
| -#define SAHARA_REG_FADDR 0x18 |
124 |
| -#define SAHARA_REG_CDAR 0x1C |
125 |
| -#define SAHARA_REG_IDAR 0x20 |
| 77 | +#define SAHARA_QUEUE_LENGTH 1 |
| 78 | + |
| 79 | +#define SAHARA_REG_VERSION 0x00 |
| 80 | +#define SAHARA_REG_DAR 0x04 |
| 81 | +#define SAHARA_REG_CONTROL 0x08 |
| 82 | +#define SAHARA_CONTROL_SET_THROTTLE(x) (((x) & 0xff) << 24) |
| 83 | +#define SAHARA_CONTROL_SET_MAXBURST(x) (((x) & 0xff) << 16) |
| 84 | +#define SAHARA_CONTROL_RNG_AUTORSD (1 << 7) |
| 85 | +#define SAHARA_CONTROL_ENABLE_INT (1 << 4) |
| 86 | +#define SAHARA_REG_CMD 0x0C |
| 87 | +#define SAHARA_CMD_RESET (1 << 0) |
| 88 | +#define SAHARA_CMD_CLEAR_INT (1 << 8) |
| 89 | +#define SAHARA_CMD_CLEAR_ERR (1 << 9) |
| 90 | +#define SAHARA_CMD_SINGLE_STEP (1 << 10) |
| 91 | +#define SAHARA_CMD_MODE_BATCH (1 << 16) |
| 92 | +#define SAHARA_CMD_MODE_DEBUG (1 << 18) |
| 93 | +#define SAHARA_REG_STATUS 0x10 |
| 94 | +#define SAHARA_STATUS_GET_STATE(x) ((x) & 0x7) |
| 95 | +#define SAHARA_STATE_IDLE 0 |
| 96 | +#define SAHARA_STATE_BUSY 1 |
| 97 | +#define SAHARA_STATE_ERR 2 |
| 98 | +#define SAHARA_STATE_FAULT 3 |
| 99 | +#define SAHARA_STATE_COMPLETE 4 |
| 100 | +#define SAHARA_STATE_COMP_FLAG (1 << 2) |
| 101 | +#define SAHARA_STATUS_DAR_FULL (1 << 3) |
| 102 | +#define SAHARA_STATUS_ERROR (1 << 4) |
| 103 | +#define SAHARA_STATUS_SECURE (1 << 5) |
| 104 | +#define SAHARA_STATUS_FAIL (1 << 6) |
| 105 | +#define SAHARA_STATUS_INIT (1 << 7) |
| 106 | +#define SAHARA_STATUS_RNG_RESEED (1 << 8) |
| 107 | +#define SAHARA_STATUS_ACTIVE_RNG (1 << 9) |
| 108 | +#define SAHARA_STATUS_ACTIVE_MDHA (1 << 10) |
| 109 | +#define SAHARA_STATUS_ACTIVE_SKHA (1 << 11) |
| 110 | +#define SAHARA_STATUS_MODE_BATCH (1 << 16) |
| 111 | +#define SAHARA_STATUS_MODE_DEDICATED (1 << 17) |
| 112 | +#define SAHARA_STATUS_MODE_DEBUG (1 << 18) |
| 113 | +#define SAHARA_STATUS_GET_ISTATE(x) (((x) >> 24) & 0xff) |
| 114 | +#define SAHARA_REG_ERRSTATUS 0x14 |
| 115 | +#define SAHARA_ERRSTATUS_GET_SOURCE(x) ((x) & 0xf) |
| 116 | +#define SAHARA_ERRSOURCE_CHA 14 |
| 117 | +#define SAHARA_ERRSOURCE_DMA 15 |
| 118 | +#define SAHARA_ERRSTATUS_DMA_DIR (1 << 8) |
| 119 | +#define SAHARA_ERRSTATUS_GET_DMASZ(x) (((x) >> 9) & 0x3) |
| 120 | +#define SAHARA_ERRSTATUS_GET_DMASRC(x) (((x) >> 13) & 0x7) |
| 121 | +#define SAHARA_ERRSTATUS_GET_CHASRC(x) (((x) >> 16) & 0xfff) |
| 122 | +#define SAHARA_ERRSTATUS_GET_CHAERR(x) (((x) >> 28) & 0x3) |
| 123 | +#define SAHARA_REG_FADDR 0x18 |
| 124 | +#define SAHARA_REG_CDAR 0x1C |
| 125 | +#define SAHARA_REG_IDAR 0x20 |
126 | 126 |
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127 | 127 | struct sahara_hw_desc {
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128 | 128 | u32 hdr;
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