File tree Expand file tree Collapse file tree 1 file changed +13
-1
lines changed Expand file tree Collapse file tree 1 file changed +13
-1
lines changed Original file line number Diff line number Diff line change @@ -372,8 +372,20 @@ static int dw_spi_dma_setup(struct dw_spi *dws, struct spi_transfer *xfer)
372
372
{
373
373
u16 imr = 0 , dma_ctrl = 0 ;
374
374
375
+ /*
376
+ * Having a Rx DMA channel serviced with higher priority than a Tx DMA
377
+ * channel might not be enough to provide a well balanced DMA-based
378
+ * SPI transfer interface. There might still be moments when the Tx DMA
379
+ * channel is occasionally handled faster than the Rx DMA channel.
380
+ * That in its turn will eventually cause the SPI Rx FIFO overflow if
381
+ * SPI bus speed is high enough to fill the SPI Rx FIFO in before it's
382
+ * cleared by the Rx DMA channel. In order to fix the problem the Tx
383
+ * DMA activity is intentionally slowed down by limiting the SPI Tx
384
+ * FIFO depth with a value twice bigger than the Tx burst length
385
+ * calculated earlier by the dw_spi_dma_maxburst_init() method.
386
+ */
375
387
dw_writel (dws , DW_SPI_DMARDLR , dws -> rxburst - 1 );
376
- dw_writel (dws , DW_SPI_DMATDLR , dws -> fifo_len - dws -> txburst );
388
+ dw_writel (dws , DW_SPI_DMATDLR , dws -> txburst );
377
389
378
390
if (xfer -> tx_buf )
379
391
dma_ctrl |= SPI_DMA_TDMAE ;
You can’t perform that action at this time.
0 commit comments