Skip to content

Commit 8b36f7c

Browse files
EdwardSrorleon
EdwardSro
authored and
rleon
committed
RDMA/mlx5: Support OOO RX WQE consumption
Support QP with out-of-order (OOO) capabilities enabled. This allows WRs on the receiver side of the QP to be consumed OOO, permitting the sender side to transmit messages without guaranteeing arrival order on the receiver side. When enabled, the completion ordering of WRs remains in-order, regardless of the Receive WRs consumption order. RDMA Read and RDMA Atomic operations on the responder side continue to be executed in-order, while the ordering of data placement for RDMA Write and Send operations is not guaranteed. Atomic operations larger than 8 bytes are currently not supported. Therefore, when this feature is enabled, the created QP restricts its atomic support to 8 bytes at most. In addition, when querying the device, a new flag is returned in response to indicate that the Kernel supports OOO QP. Signed-off-by: Edward Srouji <[email protected]> Reviewed-by: Yishai Hadas <[email protected]> Link: https://patch.msgid.link/06ac609a5f358c8fb0a090d22c61a2f9329d82e6.1725362773.git.leon@kernel.org Signed-off-by: Leon Romanovsky <[email protected]>
1 parent 8439662 commit 8b36f7c

File tree

4 files changed

+60
-5
lines changed

4 files changed

+60
-5
lines changed

‎drivers/infiniband/hw/mlx5/main.c

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1182,6 +1182,14 @@ static int mlx5_ib_query_device(struct ib_device *ibdev,
11821182
MLX5_IB_QUERY_DEV_RESP_PACKET_BASED_CREDIT_MODE;
11831183

11841184
resp.flags |= MLX5_IB_QUERY_DEV_RESP_FLAGS_SCAT2CQE_DCT;
1185+
1186+
if (MLX5_CAP_GEN_2(mdev, dp_ordering_force) &&
1187+
(MLX5_CAP_GEN(mdev, dp_ordering_ooo_all_xrc) ||
1188+
MLX5_CAP_GEN(mdev, dp_ordering_ooo_all_dc) ||
1189+
MLX5_CAP_GEN(mdev, dp_ordering_ooo_all_rc) ||
1190+
MLX5_CAP_GEN(mdev, dp_ordering_ooo_all_ud) ||
1191+
MLX5_CAP_GEN(mdev, dp_ordering_ooo_all_uc)))
1192+
resp.flags |= MLX5_IB_QUERY_DEV_RESP_FLAGS_OOO_DP;
11851193
}
11861194

11871195
if (offsetofend(typeof(resp), sw_parsing_caps) <= uhw_outlen) {

‎drivers/infiniband/hw/mlx5/mlx5_ib.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -521,6 +521,7 @@ struct mlx5_ib_qp {
521521
struct mlx5_bf bf;
522522
u8 has_rq:1;
523523
u8 is_rss:1;
524+
u8 is_ooo_rq:1;
524525

525526
/* only for user space QPs. For kernel
526527
* we have it from the bf object

‎drivers/infiniband/hw/mlx5/qp.c

Lines changed: 46 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1960,7 +1960,7 @@ static int atomic_size_to_mode(int size_mask)
19601960
}
19611961

19621962
static int get_atomic_mode(struct mlx5_ib_dev *dev,
1963-
enum ib_qp_type qp_type)
1963+
struct mlx5_ib_qp *qp)
19641964
{
19651965
u8 atomic_operations = MLX5_CAP_ATOMIC(dev->mdev, atomic_operations);
19661966
u8 atomic = MLX5_CAP_GEN(dev->mdev, atomic);
@@ -1970,7 +1970,7 @@ static int get_atomic_mode(struct mlx5_ib_dev *dev,
19701970
if (!atomic)
19711971
return -EOPNOTSUPP;
19721972

1973-
if (qp_type == MLX5_IB_QPT_DCT)
1973+
if (qp->type == MLX5_IB_QPT_DCT)
19741974
atomic_size_mask = MLX5_CAP_ATOMIC(dev->mdev, atomic_size_dc);
19751975
else
19761976
atomic_size_mask = MLX5_CAP_ATOMIC(dev->mdev, atomic_size_qp);
@@ -1984,6 +1984,10 @@ static int get_atomic_mode(struct mlx5_ib_dev *dev,
19841984
atomic_operations & MLX5_ATOMIC_OPS_FETCH_ADD))
19851985
atomic_mode = MLX5_ATOMIC_MODE_IB_COMP;
19861986

1987+
/* OOO DP QPs do not support larger than 8-Bytes atomic operations */
1988+
if (atomic_mode > MLX5_ATOMIC_MODE_8B && qp->is_ooo_rq)
1989+
atomic_mode = MLX5_ATOMIC_MODE_8B;
1990+
19871991
return atomic_mode;
19881992
}
19891993

@@ -2839,6 +2843,29 @@ static int check_valid_flow(struct mlx5_ib_dev *dev, struct ib_pd *pd,
28392843
return 0;
28402844
}
28412845

2846+
static bool get_dp_ooo_cap(struct mlx5_core_dev *mdev, enum ib_qp_type qp_type)
2847+
{
2848+
if (!MLX5_CAP_GEN_2(mdev, dp_ordering_force))
2849+
return false;
2850+
2851+
switch (qp_type) {
2852+
case IB_QPT_RC:
2853+
return MLX5_CAP_GEN(mdev, dp_ordering_ooo_all_rc);
2854+
case IB_QPT_XRC_INI:
2855+
case IB_QPT_XRC_TGT:
2856+
return MLX5_CAP_GEN(mdev, dp_ordering_ooo_all_xrc);
2857+
case IB_QPT_UC:
2858+
return MLX5_CAP_GEN(mdev, dp_ordering_ooo_all_uc);
2859+
case IB_QPT_UD:
2860+
return MLX5_CAP_GEN(mdev, dp_ordering_ooo_all_ud);
2861+
case MLX5_IB_QPT_DCI:
2862+
case MLX5_IB_QPT_DCT:
2863+
return MLX5_CAP_GEN(mdev, dp_ordering_ooo_all_dc);
2864+
default:
2865+
return false;
2866+
}
2867+
}
2868+
28422869
static void process_vendor_flag(struct mlx5_ib_dev *dev, int *flags, int flag,
28432870
bool cond, struct mlx5_ib_qp *qp)
28442871
{
@@ -3365,7 +3392,7 @@ static int set_qpc_atomic_flags(struct mlx5_ib_qp *qp,
33653392
if (access_flags & IB_ACCESS_REMOTE_ATOMIC) {
33663393
int atomic_mode;
33673394

3368-
atomic_mode = get_atomic_mode(dev, qp->type);
3395+
atomic_mode = get_atomic_mode(dev, qp);
33693396
if (atomic_mode < 0)
33703397
return -EOPNOTSUPP;
33713398

@@ -4316,6 +4343,11 @@ static int __mlx5_ib_modify_qp(struct ib_qp *ibqp,
43164343
if (qp->flags & MLX5_IB_QP_CREATE_SQPN_QP1)
43174344
MLX5_SET(qpc, qpc, deth_sqpn, 1);
43184345

4346+
if (qp->is_ooo_rq && cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) {
4347+
MLX5_SET(qpc, qpc, dp_ordering_1, 1);
4348+
MLX5_SET(qpc, qpc, dp_ordering_force, 1);
4349+
}
4350+
43194351
mlx5_cur = to_mlx5_state(cur_state);
43204352
mlx5_new = to_mlx5_state(new_state);
43214353

@@ -4531,7 +4563,7 @@ static int mlx5_ib_modify_dct(struct ib_qp *ibqp, struct ib_qp_attr *attr,
45314563
if (attr->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC) {
45324564
int atomic_mode;
45334565

4534-
atomic_mode = get_atomic_mode(dev, MLX5_IB_QPT_DCT);
4566+
atomic_mode = get_atomic_mode(dev, qp);
45354567
if (atomic_mode < 0)
45364568
return -EOPNOTSUPP;
45374569

@@ -4573,6 +4605,10 @@ static int mlx5_ib_modify_dct(struct ib_qp *ibqp, struct ib_qp_attr *attr,
45734605
MLX5_SET(dctc, dctc, hop_limit, attr->ah_attr.grh.hop_limit);
45744606
if (attr->ah_attr.type == RDMA_AH_ATTR_TYPE_ROCE)
45754607
MLX5_SET(dctc, dctc, eth_prio, attr->ah_attr.sl & 0x7);
4608+
if (qp->is_ooo_rq) {
4609+
MLX5_SET(dctc, dctc, dp_ordering_1, 1);
4610+
MLX5_SET(dctc, dctc, dp_ordering_force, 1);
4611+
}
45764612

45774613
err = mlx5_core_create_dct(dev, &qp->dct.mdct, qp->dct.in,
45784614
MLX5_ST_SZ_BYTES(create_dct_in), out,
@@ -4676,11 +4712,16 @@ int mlx5_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
46764712
min(udata->inlen, sizeof(ucmd))))
46774713
return -EFAULT;
46784714

4679-
if (ucmd.comp_mask ||
4715+
if (ucmd.comp_mask & ~MLX5_IB_MODIFY_QP_OOO_DP ||
46804716
memchr_inv(&ucmd.burst_info.reserved, 0,
46814717
sizeof(ucmd.burst_info.reserved)))
46824718
return -EOPNOTSUPP;
46834719

4720+
if (ucmd.comp_mask & MLX5_IB_MODIFY_QP_OOO_DP) {
4721+
if (!get_dp_ooo_cap(dev->mdev, qp->type))
4722+
return -EOPNOTSUPP;
4723+
qp->is_ooo_rq = 1;
4724+
}
46844725
}
46854726

46864727
if (qp->type == IB_QPT_GSI)

‎include/uapi/rdma/mlx5-abi.h

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -252,6 +252,7 @@ enum mlx5_ib_query_dev_resp_flags {
252252
MLX5_IB_QUERY_DEV_RESP_FLAGS_CQE_128B_PAD = 1 << 1,
253253
MLX5_IB_QUERY_DEV_RESP_PACKET_BASED_CREDIT_MODE = 1 << 2,
254254
MLX5_IB_QUERY_DEV_RESP_FLAGS_SCAT2CQE_DCT = 1 << 3,
255+
MLX5_IB_QUERY_DEV_RESP_FLAGS_OOO_DP = 1 << 4,
255256
};
256257

257258
enum mlx5_ib_tunnel_offloads {
@@ -439,6 +440,10 @@ struct mlx5_ib_burst_info {
439440
__u16 reserved;
440441
};
441442

443+
enum mlx5_ib_modify_qp_mask {
444+
MLX5_IB_MODIFY_QP_OOO_DP = 1 << 0,
445+
};
446+
442447
struct mlx5_ib_modify_qp {
443448
__u32 comp_mask;
444449
struct mlx5_ib_burst_info burst_info;

0 commit comments

Comments
 (0)