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5 | 5 | * SMBus host driver for PA Semi PWRficient
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6 | 6 | */
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7 | 7 |
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| 8 | +#include <linux/bitfield.h> |
8 | 9 | #include <linux/module.h>
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9 | 10 | #include <linux/pci.h>
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10 | 11 | #include <linux/kernel.h>
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26 | 27 | #define REG_REV 0x28
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27 | 28 |
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28 | 29 | /* Register defs */
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29 |
| -#define MTXFIFO_READ 0x00000400 |
30 |
| -#define MTXFIFO_STOP 0x00000200 |
31 |
| -#define MTXFIFO_START 0x00000100 |
32 |
| -#define MTXFIFO_DATA_M 0x000000ff |
33 |
| - |
34 |
| -#define MRXFIFO_EMPTY 0x00000100 |
35 |
| -#define MRXFIFO_DATA_M 0x000000ff |
36 |
| - |
37 |
| -#define SMSTA_XEN 0x08000000 |
38 |
| -#define SMSTA_MTN 0x00200000 |
39 |
| - |
40 |
| -#define CTL_MRR 0x00000400 |
41 |
| -#define CTL_MTR 0x00000200 |
42 |
| -#define CTL_EN 0x00000800 |
43 |
| -#define CTL_CLK_M 0x000000ff |
| 30 | +#define MTXFIFO_READ BIT(10) |
| 31 | +#define MTXFIFO_STOP BIT(9) |
| 32 | +#define MTXFIFO_START BIT(8) |
| 33 | +#define MTXFIFO_DATA_M GENMASK(7, 0) |
| 34 | + |
| 35 | +#define MRXFIFO_EMPTY BIT(8) |
| 36 | +#define MRXFIFO_DATA_M GENMASK(7, 0) |
| 37 | + |
| 38 | +#define SMSTA_XIP BIT(28) |
| 39 | +#define SMSTA_XEN BIT(27) |
| 40 | +#define SMSTA_JMD BIT(25) |
| 41 | +#define SMSTA_JAM BIT(24) |
| 42 | +#define SMSTA_MTO BIT(23) |
| 43 | +#define SMSTA_MTA BIT(22) |
| 44 | +#define SMSTA_MTN BIT(21) |
| 45 | +#define SMSTA_MRNE BIT(19) |
| 46 | +#define SMSTA_MTE BIT(16) |
| 47 | +#define SMSTA_TOM BIT(6) |
| 48 | + |
| 49 | +#define CTL_EN BIT(11) |
| 50 | +#define CTL_MRR BIT(10) |
| 51 | +#define CTL_MTR BIT(9) |
| 52 | +#define CTL_UJM BIT(8) |
| 53 | +#define CTL_CLK_M GENMASK(7, 0) |
44 | 54 |
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45 | 55 | static inline void reg_write(struct pasemi_smbus *smbus, int reg, int val)
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46 | 56 | {
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