@@ -1406,35 +1406,39 @@ int __init sev_es_efi_map_ghcbs(pgd_t *pgd)
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return 0 ;
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}
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+ /* Writes to the SVSM CAA MSR are ignored */
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+ static enum es_result __vc_handle_msr_caa (struct pt_regs * regs , bool write )
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+ {
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+ if (write )
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+ return ES_OK ;
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+
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+ regs -> ax = lower_32_bits (this_cpu_read (svsm_caa_pa ));
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+ regs -> dx = upper_32_bits (this_cpu_read (svsm_caa_pa ));
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+
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+ return ES_OK ;
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+ }
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+
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static enum es_result vc_handle_msr (struct ghcb * ghcb , struct es_em_ctxt * ctxt )
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{
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struct pt_regs * regs = ctxt -> regs ;
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enum es_result ret ;
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- u64 exit_info_1 ;
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+ bool write ;
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/* Is it a WRMSR? */
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- exit_info_1 = (ctxt -> insn .opcode .bytes [1 ] == 0x30 ) ? 1 : 0 ;
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-
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- if (regs -> cx == MSR_SVSM_CAA ) {
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- /* Writes to the SVSM CAA msr are ignored */
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- if (exit_info_1 )
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- return ES_OK ;
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-
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- regs -> ax = lower_32_bits (this_cpu_read (svsm_caa_pa ));
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- regs -> dx = upper_32_bits (this_cpu_read (svsm_caa_pa ));
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+ write = ctxt -> insn .opcode .bytes [1 ] == 0x30 ;
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- return ES_OK ;
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- }
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+ if ( regs -> cx == MSR_SVSM_CAA )
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+ return __vc_handle_msr_caa ( regs , write );
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ghcb_set_rcx (ghcb , regs -> cx );
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- if (exit_info_1 ) {
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+ if (write ) {
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ghcb_set_rax (ghcb , regs -> ax );
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ghcb_set_rdx (ghcb , regs -> dx );
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}
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- ret = sev_es_ghcb_hv_call (ghcb , ctxt , SVM_EXIT_MSR , exit_info_1 , 0 );
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+ ret = sev_es_ghcb_hv_call (ghcb , ctxt , SVM_EXIT_MSR , write , 0 );
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- if ((ret == ES_OK ) && (! exit_info_1 ) ) {
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+ if ((ret == ES_OK ) && ! write ) {
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regs -> ax = ghcb -> save .rax ;
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regs -> dx = ghcb -> save .rdx ;
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}
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