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x86/sev: Cleanup vc_handle_msr()
Carve out the MSR_SVSM_CAA into a helper with the suggestion that upcoming future users should do the same. Rename that silly exit_info_1 into what it actually means in this function - whether the MSR access is a read or a write. No functional changes. Signed-off-by: Borislav Petkov (AMD) <[email protected]> Reviewed-by: Tom Lendacky <[email protected]> Reviewed-by: Pankaj Gupta <[email protected]> Link: https://lore.kernel.org/r/20241106172647.GAZyum1zngPDwyD2IJ@fat_crate.local
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arch/x86/coco/sev/core.c

Lines changed: 19 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -1406,35 +1406,39 @@ int __init sev_es_efi_map_ghcbs(pgd_t *pgd)
14061406
return 0;
14071407
}
14081408

1409+
/* Writes to the SVSM CAA MSR are ignored */
1410+
static enum es_result __vc_handle_msr_caa(struct pt_regs *regs, bool write)
1411+
{
1412+
if (write)
1413+
return ES_OK;
1414+
1415+
regs->ax = lower_32_bits(this_cpu_read(svsm_caa_pa));
1416+
regs->dx = upper_32_bits(this_cpu_read(svsm_caa_pa));
1417+
1418+
return ES_OK;
1419+
}
1420+
14091421
static enum es_result vc_handle_msr(struct ghcb *ghcb, struct es_em_ctxt *ctxt)
14101422
{
14111423
struct pt_regs *regs = ctxt->regs;
14121424
enum es_result ret;
1413-
u64 exit_info_1;
1425+
bool write;
14141426

14151427
/* Is it a WRMSR? */
1416-
exit_info_1 = (ctxt->insn.opcode.bytes[1] == 0x30) ? 1 : 0;
1417-
1418-
if (regs->cx == MSR_SVSM_CAA) {
1419-
/* Writes to the SVSM CAA msr are ignored */
1420-
if (exit_info_1)
1421-
return ES_OK;
1422-
1423-
regs->ax = lower_32_bits(this_cpu_read(svsm_caa_pa));
1424-
regs->dx = upper_32_bits(this_cpu_read(svsm_caa_pa));
1428+
write = ctxt->insn.opcode.bytes[1] == 0x30;
14251429

1426-
return ES_OK;
1427-
}
1430+
if (regs->cx == MSR_SVSM_CAA)
1431+
return __vc_handle_msr_caa(regs, write);
14281432

14291433
ghcb_set_rcx(ghcb, regs->cx);
1430-
if (exit_info_1) {
1434+
if (write) {
14311435
ghcb_set_rax(ghcb, regs->ax);
14321436
ghcb_set_rdx(ghcb, regs->dx);
14331437
}
14341438

1435-
ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_MSR, exit_info_1, 0);
1439+
ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_MSR, write, 0);
14361440

1437-
if ((ret == ES_OK) && (!exit_info_1)) {
1441+
if ((ret == ES_OK) && !write) {
14381442
regs->ax = ghcb->save.rax;
14391443
regs->dx = ghcb->save.rdx;
14401444
}

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