@@ -3627,7 +3627,6 @@ static int arm_smmu_init_queues(struct arm_smmu_device *smmu)
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static int arm_smmu_init_strtab_2lvl (struct arm_smmu_device * smmu )
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{
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- u64 reg ;
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u32 l1size ;
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struct arm_smmu_strtab_cfg * cfg = & smmu -> strtab_cfg ;
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unsigned int last_sid_idx =
@@ -3651,13 +3650,6 @@ static int arm_smmu_init_strtab_2lvl(struct arm_smmu_device *smmu)
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return - ENOMEM ;
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}
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- /* Configure strtab_base_cfg for 2 levels */
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- reg = FIELD_PREP (STRTAB_BASE_CFG_FMT , STRTAB_BASE_CFG_FMT_2LVL );
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- reg |= FIELD_PREP (STRTAB_BASE_CFG_LOG2SIZE ,
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- ilog2 (cfg -> l2 .num_l1_ents ) + STRTAB_SPLIT );
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- reg |= FIELD_PREP (STRTAB_BASE_CFG_SPLIT , STRTAB_SPLIT );
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- cfg -> strtab_base_cfg = reg ;
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-
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cfg -> l2 .l2ptrs = devm_kcalloc (smmu -> dev , cfg -> l2 .num_l1_ents ,
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sizeof (* cfg -> l2 .l2ptrs ), GFP_KERNEL );
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if (!cfg -> l2 .l2ptrs )
@@ -3668,7 +3660,6 @@ static int arm_smmu_init_strtab_2lvl(struct arm_smmu_device *smmu)
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static int arm_smmu_init_strtab_linear (struct arm_smmu_device * smmu )
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{
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- u64 reg ;
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u32 size ;
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struct arm_smmu_strtab_cfg * cfg = & smmu -> strtab_cfg ;
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@@ -3684,34 +3675,21 @@ static int arm_smmu_init_strtab_linear(struct arm_smmu_device *smmu)
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}
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cfg -> linear .num_ents = 1 << smmu -> sid_bits ;
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- /* Configure strtab_base_cfg for a linear table covering all SIDs */
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- reg = FIELD_PREP (STRTAB_BASE_CFG_FMT , STRTAB_BASE_CFG_FMT_LINEAR );
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- reg |= FIELD_PREP (STRTAB_BASE_CFG_LOG2SIZE , smmu -> sid_bits );
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- cfg -> strtab_base_cfg = reg ;
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-
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arm_smmu_init_initial_stes (cfg -> linear .table , cfg -> linear .num_ents );
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return 0 ;
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}
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static int arm_smmu_init_strtab (struct arm_smmu_device * smmu )
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{
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- u64 reg ;
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int ret ;
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- if (smmu -> features & ARM_SMMU_FEAT_2_LVL_STRTAB ) {
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+ if (smmu -> features & ARM_SMMU_FEAT_2_LVL_STRTAB )
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ret = arm_smmu_init_strtab_2lvl (smmu );
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- reg = smmu -> strtab_cfg .l2 .l1_dma & STRTAB_BASE_ADDR_MASK ;
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- } else {
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+ else
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ret = arm_smmu_init_strtab_linear (smmu );
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- reg = smmu -> strtab_cfg .linear .ste_dma & STRTAB_BASE_ADDR_MASK ;
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- }
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if (ret )
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return ret ;
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- /* Set the strtab base address */
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- reg |= STRTAB_BASE_RA ;
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- smmu -> strtab_cfg .strtab_base = reg ;
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-
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ida_init (& smmu -> vmid_map );
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return 0 ;
@@ -3927,6 +3905,30 @@ static int arm_smmu_device_disable(struct arm_smmu_device *smmu)
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return ret ;
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}
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+ static void arm_smmu_write_strtab (struct arm_smmu_device * smmu )
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+ {
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+ struct arm_smmu_strtab_cfg * cfg = & smmu -> strtab_cfg ;
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+ dma_addr_t dma ;
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+ u32 reg ;
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+
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+ if (smmu -> features & ARM_SMMU_FEAT_2_LVL_STRTAB ) {
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+ reg = FIELD_PREP (STRTAB_BASE_CFG_FMT ,
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+ STRTAB_BASE_CFG_FMT_2LVL ) |
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+ FIELD_PREP (STRTAB_BASE_CFG_LOG2SIZE ,
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+ ilog2 (cfg -> l2 .num_l1_ents ) + STRTAB_SPLIT ) |
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+ FIELD_PREP (STRTAB_BASE_CFG_SPLIT , STRTAB_SPLIT );
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+ dma = cfg -> l2 .l1_dma ;
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+ } else {
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+ reg = FIELD_PREP (STRTAB_BASE_CFG_FMT ,
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+ STRTAB_BASE_CFG_FMT_LINEAR ) |
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+ FIELD_PREP (STRTAB_BASE_CFG_LOG2SIZE , smmu -> sid_bits );
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+ dma = cfg -> linear .ste_dma ;
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+ }
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+ writeq_relaxed ((dma & STRTAB_BASE_ADDR_MASK ) | STRTAB_BASE_RA ,
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+ smmu -> base + ARM_SMMU_STRTAB_BASE );
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+ writel_relaxed (reg , smmu -> base + ARM_SMMU_STRTAB_BASE_CFG );
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+ }
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+
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static int arm_smmu_device_reset (struct arm_smmu_device * smmu )
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{
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int ret ;
@@ -3962,10 +3964,7 @@ static int arm_smmu_device_reset(struct arm_smmu_device *smmu)
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writel_relaxed (reg , smmu -> base + ARM_SMMU_CR2 );
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/* Stream table */
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- writeq_relaxed (smmu -> strtab_cfg .strtab_base ,
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- smmu -> base + ARM_SMMU_STRTAB_BASE );
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- writel_relaxed (smmu -> strtab_cfg .strtab_base_cfg ,
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- smmu -> base + ARM_SMMU_STRTAB_BASE_CFG );
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+ arm_smmu_write_strtab (smmu );
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/* Command queue */
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writeq_relaxed (smmu -> cmdq .q .q_base , smmu -> base + ARM_SMMU_CMDQ_BASE );
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