@@ -2852,10 +2852,23 @@ static u32 rtl_csi_read(struct rtl8169_private *tp, int addr)
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RTL_R32 (tp , CSIDR ) : ~0 ;
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}
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+ static void rtl_csi_mod (struct rtl8169_private * tp , int addr ,
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+ u32 mask , u32 set )
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+ {
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+ u32 val ;
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+
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+ WARN (addr % 4 , "Invalid CSI address %#x\n" , addr );
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+
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+ netdev_notice_once (tp -> dev ,
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+ "No native access to PCI extended config space, falling back to CSI\n" );
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+
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+ val = rtl_csi_read (tp , addr );
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+ rtl_csi_write (tp , addr , (val & ~mask ) | set );
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+ }
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+
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static void rtl_disable_zrxdc_timeout (struct rtl8169_private * tp )
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{
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struct pci_dev * pdev = tp -> pci_dev ;
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- u32 csi ;
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int rc ;
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u8 val ;
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@@ -2872,16 +2885,12 @@ static void rtl_disable_zrxdc_timeout(struct rtl8169_private *tp)
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}
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}
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- netdev_notice_once (tp -> dev ,
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- "No native access to PCI extended config space, falling back to CSI\n" );
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- csi = rtl_csi_read (tp , RTL_GEN3_RELATED_OFF );
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- rtl_csi_write (tp , RTL_GEN3_RELATED_OFF , csi & ~RTL_GEN3_ZRXDC_NONCOMPL );
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+ rtl_csi_mod (tp , RTL_GEN3_RELATED_OFF , RTL_GEN3_ZRXDC_NONCOMPL , 0 );
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}
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static void rtl_set_aspm_entry_latency (struct rtl8169_private * tp , u8 val )
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{
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struct pci_dev * pdev = tp -> pci_dev ;
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- u32 csi ;
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/* According to Realtek the value at config space address 0x070f
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* controls the L0s/L1 entrance latency. We try standard ECAM access
@@ -2893,10 +2902,7 @@ static void rtl_set_aspm_entry_latency(struct rtl8169_private *tp, u8 val)
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pci_write_config_byte (pdev , 0x070f , val ) == PCIBIOS_SUCCESSFUL )
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return ;
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- netdev_notice_once (tp -> dev ,
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- "No native access to PCI extended config space, falling back to CSI\n" );
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- csi = rtl_csi_read (tp , 0x070c ) & 0x00ffffff ;
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- rtl_csi_write (tp , 0x070c , csi | val << 24 );
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+ rtl_csi_mod (tp , 0x070c , 0xff000000 , val << 24 );
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}
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static void rtl_set_def_aspm_entry_latency (struct rtl8169_private * tp )
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