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drm/i915/dsb: Precompute DSB_CHICKEN
Adjust the code that determines the correct DSB_CHICKEN value to be usable for use within DSB commands themselves. Ie. precompute it based on our knowledge of what the hardware state (VRR vs. not mainly) will be at the time of the commit. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Animesh Manna <[email protected]>
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drivers/gpu/drm/i915/display/intel_dsb.c

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -43,6 +43,7 @@ struct intel_dsb {
4343
*/
4444
unsigned int ins_start_offset;
4545

46+
u32 chicken;
4647
int hw_dewake_scanline;
4748
};
4849

@@ -149,9 +150,10 @@ static int dsb_scanline_to_hw(struct intel_atomic_state *state,
149150
return (scanline + vtotal - intel_crtc_scanline_offset(crtc_state)) % vtotal;
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}
151152

152-
static u32 dsb_chicken(struct intel_crtc *crtc)
153+
static u32 dsb_chicken(struct intel_atomic_state *state,
154+
struct intel_crtc *crtc)
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{
154-
if (crtc->mode_flags & I915_MODE_FLAG_VRR)
156+
if (pre_commit_is_vrr_active(state, crtc))
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return DSB_SKIP_WAITS_EN |
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DSB_CTRL_WAIT_SAFE_WINDOW |
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DSB_CTRL_NO_WAIT_VBLANK |
@@ -447,7 +449,7 @@ static void _intel_dsb_commit(struct intel_dsb *dsb, u32 ctrl,
447449
ctrl | DSB_ENABLE);
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449451
intel_de_write_fw(display, DSB_CHICKEN(pipe, dsb->id),
450-
dsb_chicken(crtc));
452+
dsb->chicken);
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452454
intel_de_write_fw(display, DSB_INTERRUPT(pipe, dsb->id),
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dsb_error_int_status(display) | DSB_PROG_INT_STATUS |
@@ -578,6 +580,7 @@ struct intel_dsb *intel_dsb_prepare(struct intel_atomic_state *state,
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dsb->free_pos = 0;
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dsb->ins_start_offset = 0;
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583+
dsb->chicken = dsb_chicken(state, crtc);
581584
dsb->hw_dewake_scanline =
582585
dsb_scanline_to_hw(state, crtc, dsb_dewake_scanline(state, crtc));
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