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21 | 21 | SPI_MEM_OP_NO_DUMMY, \
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22 | 22 | SPI_MEM_OP_DATA_IN(1, buf, 0))
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23 | 23 |
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24 |
| -#define S3AN_INFO(_jedec_id, _n_sectors, _page_size) \ |
25 |
| - SPI_NOR_ID(_jedec_id, 0), \ |
26 |
| - .size = 8 * (_page_size) * (_n_sectors), \ |
27 |
| - .sector_size = (8 * (_page_size)), \ |
28 |
| - .page_size = (_page_size), \ |
29 |
| - .flags = SPI_NOR_NO_FR |
| 24 | +#define S3AN_FLASH(_id, _name, _n_sectors, _page_size) \ |
| 25 | + .id = _id, \ |
| 26 | + .name = _name, \ |
| 27 | + .size = 8 * (_page_size) * (_n_sectors), \ |
| 28 | + .sector_size = (8 * (_page_size)), \ |
| 29 | + .page_size = (_page_size), \ |
| 30 | + .flags = SPI_NOR_NO_FR |
30 | 31 |
|
31 | 32 | /* Xilinx S3AN share MFR with Atmel SPI NOR */
|
32 | 33 | static const struct flash_info xilinx_nor_parts[] = {
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33 | 34 | /* Xilinx S3AN Internal Flash */
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34 |
| - { "3S50AN", S3AN_INFO(0x1f2200, 64, 264) }, |
35 |
| - { "3S200AN", S3AN_INFO(0x1f2400, 256, 264) }, |
36 |
| - { "3S400AN", S3AN_INFO(0x1f2400, 256, 264) }, |
37 |
| - { "3S700AN", S3AN_INFO(0x1f2500, 512, 264) }, |
38 |
| - { "3S1400AN", S3AN_INFO(0x1f2600, 512, 528) }, |
| 35 | + { S3AN_FLASH(SNOR_ID(0x1f, 0x22, 0x00), "3S50AN", 64, 264) }, |
| 36 | + { S3AN_FLASH(SNOR_ID(0x1f, 0x24, 0x00), "3S200AN", 256, 264) }, |
| 37 | + { S3AN_FLASH(SNOR_ID(0x1f, 0x24, 0x00), "3S400AN", 256, 264) }, |
| 38 | + { S3AN_FLASH(SNOR_ID(0x1f, 0x25, 0x00), "3S700AN", 512, 264) }, |
| 39 | + { S3AN_FLASH(SNOR_ID(0x1f, 0x26, 0x00), "3S1400AN", 512, 528) }, |
39 | 40 | };
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40 | 41 |
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41 | 42 | /*
|
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