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RISC-V: Canaan devicetree fixes
This series should rid us of dtbs_check errors for the RISC-V Canaan k210 based boards. To make keeping it that way a little easier, I changed the Canaan devicetree Makefile so that it would build all of the devicetrees in the directory if SOC_CANAAN. Link: https://lore.kernel.org/all/mhng-85044754-c361-40bc-a6a2-7082f35930bb@palmer-ri-x1c9/ * remotes/palmer/riscv-canaan_dt_schema: riscv: dts: canaan: build all devicetress if SOC_CANAAN riscv: dts: canaan: add specific compatible for kd233's LCD riscv: dts: canaan: fix bus {ranges,reg} warnings riscv: dts: canaan: remove spi-max-frequency from controllers riscv: dts: canaan: use custom compatible for k210 i2s riscv: dts: canaan: fix kd233 display spi frequency riscv: dts: canaan: fix mmc node names riscv: dts: canaan: fix the k210's timer nodes riscv: dts: canaan: fix the k210's memory node dt-bindings: memory-controllers: add canaan k210 sram controller dt-bindings: display: ili9341: document canaan kd233's lcd dt-bindings: display: convert ilitek,ili9341.txt to dt-schema
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-72
lines changed

10 files changed

+153
-72
lines changed

Documentation/devicetree/bindings/display/ilitek,ili9341.txt

Lines changed: 0 additions & 27 deletions
This file was deleted.

Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml

Lines changed: 35 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -21,8 +21,10 @@ properties:
2121
compatible:
2222
items:
2323
- enum:
24+
- adafruit,yx240qv29
2425
# ili9341 240*320 Color on stm32f429-disco board
2526
- st,sf-tc240t-9370-t
27+
- canaan,kd233-tft
2628
- const: ilitek,ili9341
2729

2830
reg: true
@@ -47,31 +49,50 @@ properties:
4749
vddi-led-supply:
4850
description: Voltage supply for the LED driver (1.65 .. 3.3 V)
4951

50-
additionalProperties: false
52+
unevaluatedProperties: false
5153

5254
required:
5355
- compatible
5456
- reg
5557
- dc-gpios
56-
- port
58+
59+
if:
60+
properties:
61+
compatible:
62+
contains:
63+
enum:
64+
- st,sf-tc240t-9370-t
65+
then:
66+
required:
67+
- port
5768

5869
examples:
5970
- |+
71+
#include <dt-bindings/gpio/gpio.h>
6072
spi {
6173
#address-cells = <1>;
6274
#size-cells = <0>;
6375
panel: display@0 {
64-
compatible = "st,sf-tc240t-9370-t",
65-
"ilitek,ili9341";
66-
reg = <0>;
67-
spi-3wire;
68-
spi-max-frequency = <10000000>;
69-
dc-gpios = <&gpiod 13 0>;
70-
port {
71-
panel_in: endpoint {
72-
remote-endpoint = <&display_out>;
73-
};
74-
};
75-
};
76+
compatible = "st,sf-tc240t-9370-t",
77+
"ilitek,ili9341";
78+
reg = <0>;
79+
spi-3wire;
80+
spi-max-frequency = <10000000>;
81+
dc-gpios = <&gpiod 13 0>;
82+
port {
83+
panel_in: endpoint {
84+
remote-endpoint = <&display_out>;
85+
};
86+
};
87+
};
88+
display@1{
89+
compatible = "adafruit,yx240qv29", "ilitek,ili9341";
90+
reg = <1>;
91+
spi-max-frequency = <10000000>;
92+
dc-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
93+
reset-gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
94+
rotation = <270>;
95+
backlight = <&backlight>;
7696
};
97+
};
7798
...
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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,52 @@
1+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+
%YAML 1.2
3+
---
4+
$id: http://devicetree.org/schemas/memory-controllers/canaan,k210-sram.yaml#
5+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+
title: Canaan K210 SRAM memory controller
8+
9+
description:
10+
The Canaan K210 SRAM memory controller is responsible for the system's 8 MiB
11+
of SRAM. The controller is initialised by the bootloader, which configures
12+
its clocks, before OS bringup.
13+
14+
maintainers:
15+
- Conor Dooley <[email protected]>
16+
17+
properties:
18+
compatible:
19+
enum:
20+
- canaan,k210-sram
21+
22+
clocks:
23+
minItems: 1
24+
items:
25+
- description: sram0 clock
26+
- description: sram1 clock
27+
- description: aisram clock
28+
29+
clock-names:
30+
minItems: 1
31+
items:
32+
- const: sram0
33+
- const: sram1
34+
- const: aisram
35+
36+
required:
37+
- compatible
38+
- clocks
39+
- clock-names
40+
41+
additionalProperties: false
42+
43+
examples:
44+
- |
45+
#include <dt-bindings/clock/k210-clk.h>
46+
memory-controller {
47+
compatible = "canaan,k210-sram";
48+
clocks = <&sysclk K210_CLK_SRAM0>,
49+
<&sysclk K210_CLK_SRAM1>,
50+
<&sysclk K210_CLK_AI>;
51+
clock-names = "sram0", "sram1", "aisram";
52+
};

arch/riscv/boot/dts/canaan/Makefile

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,9 @@
11
# SPDX-License-Identifier: GPL-2.0
2-
dtb-$(CONFIG_SOC_CANAAN_K210_DTB_BUILTIN) += $(addsuffix .dtb, $(CONFIG_SOC_CANAAN_K210_DTB_SOURCE))
3-
obj-$(CONFIG_SOC_CANAAN_K210_DTB_BUILTIN) += $(addsuffix .o, $(dtb-y))
2+
dtb-$(CONFIG_SOC_CANAAN) += canaan_kd233.dtb
3+
dtb-$(CONFIG_SOC_CANAAN) += k210_generic.dtb
4+
dtb-$(CONFIG_SOC_CANAAN) += sipeed_maix_bit.dtb
5+
dtb-$(CONFIG_SOC_CANAAN) += sipeed_maix_dock.dtb
6+
dtb-$(CONFIG_SOC_CANAAN) += sipeed_maix_go.dtb
7+
dtb-$(CONFIG_SOC_CANAAN) += sipeed_maixduino.dtb
8+
9+
obj-$(CONFIG_SOC_CANAAN_K210_DTB_BUILTIN) += $(addsuffix .dtb.o, $(CONFIG_SOC_CANAAN_K210_DTB_SOURCE))

arch/riscv/boot/dts/canaan/canaan_kd233.dts

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -127,10 +127,10 @@
127127
cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
128128

129129
panel@0 {
130-
compatible = "ilitek,ili9341";
130+
compatible = "canaan,kd233-tft", "ilitek,ili9341";
131131
reg = <0>;
132132
dc-gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>;
133-
spi-max-frequency = <15000000>;
133+
spi-max-frequency = <10000000>;
134134
status = "disabled";
135135
};
136136
};
@@ -142,7 +142,7 @@
142142
cs-gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
143143
status = "okay";
144144

145-
slot@0 {
145+
mmc@0 {
146146
compatible = "mmc-spi-slot";
147147
reg = <0>;
148148
voltage-ranges = <3300 3300>;

arch/riscv/boot/dts/canaan/k210.dtsi

Lines changed: 51 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -81,11 +81,13 @@
8181

8282
sram: memory@80000000 {
8383
device_type = "memory";
84+
reg = <0x80000000 0x400000>, /* sram0 4 MiB */
85+
<0x80400000 0x200000>, /* sram1 2 MiB */
86+
<0x80600000 0x200000>; /* aisram 2 MiB */
87+
};
88+
89+
sram_controller: memory-controller {
8490
compatible = "canaan,k210-sram";
85-
reg = <0x80000000 0x400000>,
86-
<0x80400000 0x200000>,
87-
<0x80600000 0x200000>;
88-
reg-names = "sram0", "sram1", "aisram";
8991
clocks = <&sysclk K210_CLK_SRAM0>,
9092
<&sysclk K210_CLK_SRAM1>,
9193
<&sysclk K210_CLK_AI>;
@@ -173,7 +175,7 @@
173175
#address-cells = <1>;
174176
#size-cells = <1>;
175177
compatible = "simple-pm-bus";
176-
ranges;
178+
ranges = <0x50200000 0x50200000 0x200000>;
177179
clocks = <&sysclk K210_CLK_APB0>;
178180

179181
gpio1: gpio@50200000 {
@@ -261,7 +263,7 @@
261263
};
262264

263265
i2s0: i2s@50250000 {
264-
compatible = "snps,designware-i2s";
266+
compatible = "canaan,k210-i2s", "snps,designware-i2s";
265267
reg = <0x50250000 0x200>;
266268
interrupts = <5>;
267269
clocks = <&sysclk K210_CLK_I2S0>;
@@ -270,7 +272,7 @@
270272
};
271273

272274
i2s1: i2s@50260000 {
273-
compatible = "snps,designware-i2s";
275+
compatible = "canaan,k210-i2s", "snps,designware-i2s";
274276
reg = <0x50260000 0x200>;
275277
interrupts = <6>;
276278
clocks = <&sysclk K210_CLK_I2S1>;
@@ -279,7 +281,7 @@
279281
};
280282

281283
i2s2: i2s@50270000 {
282-
compatible = "snps,designware-i2s";
284+
compatible = "canaan,k210-i2s", "snps,designware-i2s";
283285
reg = <0x50270000 0x200>;
284286
interrupts = <7>;
285287
clocks = <&sysclk K210_CLK_I2S2>;
@@ -329,28 +331,58 @@
329331

330332
timer0: timer@502d0000 {
331333
compatible = "snps,dw-apb-timer";
332-
reg = <0x502D0000 0x100>;
333-
interrupts = <14>, <15>;
334+
reg = <0x502D0000 0x14>;
335+
interrupts = <14>;
334336
clocks = <&sysclk K210_CLK_TIMER0>,
335337
<&sysclk K210_CLK_APB0>;
336338
clock-names = "timer", "pclk";
337339
resets = <&sysrst K210_RST_TIMER0>;
338340
};
339341

340-
timer1: timer@502e0000 {
342+
timer1: timer@502d0014 {
343+
compatible = "snps,dw-apb-timer";
344+
reg = <0x502D0014 0x14>;
345+
interrupts = <15>;
346+
clocks = <&sysclk K210_CLK_TIMER0>,
347+
<&sysclk K210_CLK_APB0>;
348+
clock-names = "timer", "pclk";
349+
resets = <&sysrst K210_RST_TIMER0>;
350+
};
351+
352+
timer2: timer@502e0000 {
353+
compatible = "snps,dw-apb-timer";
354+
reg = <0x502E0000 0x14>;
355+
interrupts = <16>;
356+
clocks = <&sysclk K210_CLK_TIMER1>,
357+
<&sysclk K210_CLK_APB0>;
358+
clock-names = "timer", "pclk";
359+
resets = <&sysrst K210_RST_TIMER1>;
360+
};
361+
362+
timer3: timer@502e0014 {
341363
compatible = "snps,dw-apb-timer";
342-
reg = <0x502E0000 0x100>;
343-
interrupts = <16>, <17>;
364+
reg = <0x502E0014 0x114>;
365+
interrupts = <17>;
344366
clocks = <&sysclk K210_CLK_TIMER1>,
345367
<&sysclk K210_CLK_APB0>;
346368
clock-names = "timer", "pclk";
347369
resets = <&sysrst K210_RST_TIMER1>;
348370
};
349371

350-
timer2: timer@502f0000 {
372+
timer4: timer@502f0000 {
351373
compatible = "snps,dw-apb-timer";
352-
reg = <0x502F0000 0x100>;
353-
interrupts = <18>, <19>;
374+
reg = <0x502F0000 0x14>;
375+
interrupts = <18>;
376+
clocks = <&sysclk K210_CLK_TIMER2>,
377+
<&sysclk K210_CLK_APB0>;
378+
clock-names = "timer", "pclk";
379+
resets = <&sysrst K210_RST_TIMER2>;
380+
};
381+
382+
timer5: timer@502f0014 {
383+
compatible = "snps,dw-apb-timer";
384+
reg = <0x502F0014 0x14>;
385+
interrupts = <19>;
354386
clocks = <&sysclk K210_CLK_TIMER2>,
355387
<&sysclk K210_CLK_APB0>;
356388
clock-names = "timer", "pclk";
@@ -362,7 +394,7 @@
362394
#address-cells = <1>;
363395
#size-cells = <1>;
364396
compatible = "simple-pm-bus";
365-
ranges;
397+
ranges = <0x50400000 0x50400000 0x40100>;
366398
clocks = <&sysclk K210_CLK_APB1>;
367399

368400
wdt0: watchdog@50400000 {
@@ -417,7 +449,7 @@
417449
#address-cells = <1>;
418450
#size-cells = <1>;
419451
compatible = "simple-pm-bus";
420-
ranges;
452+
ranges = <0x52000000 0x52000000 0x2000200>;
421453
clocks = <&sysclk K210_CLK_APB2>;
422454

423455
spi0: spi@52000000 {
@@ -431,7 +463,6 @@
431463
clock-names = "ssi_clk", "pclk";
432464
resets = <&sysrst K210_RST_SPI0>;
433465
reset-names = "spi";
434-
spi-max-frequency = <25000000>;
435466
num-cs = <4>;
436467
reg-io-width = <4>;
437468
};
@@ -447,7 +478,6 @@
447478
clock-names = "ssi_clk", "pclk";
448479
resets = <&sysrst K210_RST_SPI1>;
449480
reset-names = "spi";
450-
spi-max-frequency = <25000000>;
451481
num-cs = <4>;
452482
reg-io-width = <4>;
453483
};
@@ -463,8 +493,7 @@
463493
clock-names = "ssi_clk", "pclk";
464494
resets = <&sysrst K210_RST_SPI3>;
465495
reset-names = "spi";
466-
/* Could possibly go up to 200 MHz */
467-
spi-max-frequency = <100000000>;
496+
468497
num-cs = <4>;
469498
reg-io-width = <4>;
470499
};

arch/riscv/boot/dts/canaan/sipeed_maix_bit.dts

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -189,7 +189,7 @@
189189
cs-gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
190190
status = "okay";
191191

192-
slot@0 {
192+
mmc@0 {
193193
compatible = "mmc-spi-slot";
194194
reg = <0>;
195195
voltage-ranges = <3300 3300>;

arch/riscv/boot/dts/canaan/sipeed_maix_dock.dts

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -191,7 +191,7 @@
191191
cs-gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
192192
status = "okay";
193193

194-
slot@0 {
194+
mmc@0 {
195195
compatible = "mmc-spi-slot";
196196
reg = <0>;
197197
voltage-ranges = <3300 3300>;

arch/riscv/boot/dts/canaan/sipeed_maix_go.dts

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -199,7 +199,7 @@
199199
cs-gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
200200
status = "okay";
201201

202-
slot@0 {
202+
mmc@0 {
203203
compatible = "mmc-spi-slot";
204204
reg = <0>;
205205
voltage-ranges = <3300 3300>;

arch/riscv/boot/dts/canaan/sipeed_maixduino.dts

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -164,7 +164,7 @@
164164
cs-gpios = <&gpio1_0 2 GPIO_ACTIVE_LOW>;
165165
status = "okay";
166166

167-
slot@0 {
167+
mmc@0 {
168168
compatible = "mmc-spi-slot";
169169
reg = <0>;
170170
voltage-ranges = <3300 3300>;

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