Skip to content

Commit 8f6ee51

Browse files
author
Ingo Molnar
committed
Merge tag 'perf-core-for-mingo-5.5-20191119' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux into perf/core
Pull perf/core improvements and fixes from Arnaldo Carvalho de Melo: x86/insn: Adrian Hunter: - Add some more Intel instructions to the opcode map: cldemote, encls, enclu, enclv, enqcmd, enqcmds, movdir64b, movdiri, pconfig, tpause, umonitor, umwait, wbnoinvd. - The instruction decoding can be tested using the perf tools' "x86 instruction decoder - new instructions" test as folllows: $ perf test -v "new " 2>&1 | grep -i cldemote Decoded ok: 0f 1c 00 cldemote (%eax) Decoded ok: 0f 1c 05 78 56 34 12 cldemote 0x12345678 Decoded ok: 0f 1c 84 c8 78 56 34 12 cldemote 0x12345678(%eax,%ecx,8) Decoded ok: 0f 1c 00 cldemote (%rax) Decoded ok: 41 0f 1c 00 cldemote (%r8) Decoded ok: 0f 1c 04 25 78 56 34 12 cldemote 0x12345678 Decoded ok: 0f 1c 84 c8 78 56 34 12 cldemote 0x12345678(%rax,%rcx,8) Decoded ok: 41 0f 1c 84 c8 78 56 34 12 cldemote 0x12345678(%r8,%rcx,8) $ perf test -v "new " 2>&1 | grep -i tpause Decoded ok: 66 0f ae f3 tpause %ebx Decoded ok: 66 0f ae f3 tpause %ebx Decoded ok: 66 41 0f ae f0 tpause %r8d callchains: Adrian Hunter: - Fix segfault in thread__resolve_callchain_sample(). perf probe: - Line fixes to show only lines where probes can be used with 'perf probe -L', and when reporting them via 'perf probe -l'. - Support multiprobe events. perf scripts python: Adrian Hunter: - Fix use of TRUE with SQLite < 3.23 in exported-sql-viewer.py. perf maps: - Trim 'struct map' by removing the rb_node member for sorting by map name, as that is only needed for processing kernel maps, and only when classifying symbols by section at load time. Sort them by name using qsort() and do lookups using bsearch() when map_groups__find_by_name() is used. perf parse: Ian Rogers: - Report initial event parsing error, providing a less cryptic message to state that a PMU wasn't found in the system. perf vendor events: James Clark: - Fix commas so that PMU event files for arm64, power8 and power nine become valid JSON. libtraceevent: Konstantin Khlebnikov: - Fix parsing of event %o and %X argument types. Signed-off-by: Arnaldo Carvalho de Melo <[email protected]> Signed-off-by: Ingo Molnar <[email protected]>
2 parents b0aeb45 + a910e46 commit 8f6ee51

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

66 files changed

+2888
-2366
lines changed

arch/x86/lib/x86-opcode-map.txt

Lines changed: 12 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -333,7 +333,7 @@ AVXcode: 1
333333
06: CLTS
334334
07: SYSRET (o64)
335335
08: INVD
336-
09: WBINVD
336+
09: WBINVD | WBNOINVD (F3)
337337
0a:
338338
0b: UD2 (1B)
339339
0c:
@@ -364,7 +364,7 @@ AVXcode: 1
364364
# a ModR/M byte.
365365
1a: BNDCL Gv,Ev (F3) | BNDCU Gv,Ev (F2) | BNDMOV Gv,Ev (66) | BNDLDX Gv,Ev
366366
1b: BNDCN Gv,Ev (F2) | BNDMOV Ev,Gv (66) | BNDMK Gv,Ev (F3) | BNDSTX Ev,Gv
367-
1c:
367+
1c: Grp20 (1A),(1C)
368368
1d:
369369
1e:
370370
1f: NOP Ev
@@ -792,6 +792,8 @@ f3: Grp17 (1A)
792792
f5: BZHI Gy,Ey,By (v) | PEXT Gy,By,Ey (F3),(v) | PDEP Gy,By,Ey (F2),(v)
793793
f6: ADCX Gy,Ey (66) | ADOX Gy,Ey (F3) | MULX By,Gy,rDX,Ey (F2),(v)
794794
f7: BEXTR Gy,Ey,By (v) | SHLX Gy,Ey,By (66),(v) | SARX Gy,Ey,By (F3),(v) | SHRX Gy,Ey,By (F2),(v)
795+
f8: MOVDIR64B Gv,Mdqq (66) | ENQCMD Gv,Mdqq (F2) | ENQCMDS Gv,Mdqq (F3)
796+
f9: MOVDIRI My,Gy
795797
EndTable
796798

797799
Table: 3-byte opcode 2 (0x0f 0x3a)
@@ -943,9 +945,9 @@ GrpTable: Grp6
943945
EndTable
944946

945947
GrpTable: Grp7
946-
0: SGDT Ms | VMCALL (001),(11B) | VMLAUNCH (010),(11B) | VMRESUME (011),(11B) | VMXOFF (100),(11B)
947-
1: SIDT Ms | MONITOR (000),(11B) | MWAIT (001),(11B) | CLAC (010),(11B) | STAC (011),(11B)
948-
2: LGDT Ms | XGETBV (000),(11B) | XSETBV (001),(11B) | VMFUNC (100),(11B) | XEND (101)(11B) | XTEST (110)(11B)
948+
0: SGDT Ms | VMCALL (001),(11B) | VMLAUNCH (010),(11B) | VMRESUME (011),(11B) | VMXOFF (100),(11B) | PCONFIG (101),(11B) | ENCLV (000),(11B)
949+
1: SIDT Ms | MONITOR (000),(11B) | MWAIT (001),(11B) | CLAC (010),(11B) | STAC (011),(11B) | ENCLS (111),(11B)
950+
2: LGDT Ms | XGETBV (000),(11B) | XSETBV (001),(11B) | VMFUNC (100),(11B) | XEND (101)(11B) | XTEST (110)(11B) | ENCLU (111),(11B)
949951
3: LIDT Ms
950952
4: SMSW Mw/Rv
951953
5: rdpkru (110),(11B) | wrpkru (111),(11B)
@@ -1020,7 +1022,7 @@ GrpTable: Grp15
10201022
3: vstmxcsr Md (v1) | WRGSBASE Ry (F3),(11B)
10211023
4: XSAVE | ptwrite Ey (F3),(11B)
10221024
5: XRSTOR | lfence (11B)
1023-
6: XSAVEOPT | clwb (66) | mfence (11B)
1025+
6: XSAVEOPT | clwb (66) | mfence (11B) | TPAUSE Rd (66),(11B) | UMONITOR Rv (F3),(11B) | UMWAIT Rd (F2),(11B)
10241026
7: clflush | clflushopt (66) | sfence (11B)
10251027
EndTable
10261028

@@ -1051,6 +1053,10 @@ GrpTable: Grp19
10511053
6: vscatterpf1qps/d Wx (66),(ev)
10521054
EndTable
10531055

1056+
GrpTable: Grp20
1057+
0: cldemote Mb
1058+
EndTable
1059+
10541060
# AMD's Prefetch Group
10551061
GrpTable: GrpP
10561062
0: PREFETCH

tools/arch/x86/lib/x86-opcode-map.txt

Lines changed: 12 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -333,7 +333,7 @@ AVXcode: 1
333333
06: CLTS
334334
07: SYSRET (o64)
335335
08: INVD
336-
09: WBINVD
336+
09: WBINVD | WBNOINVD (F3)
337337
0a:
338338
0b: UD2 (1B)
339339
0c:
@@ -364,7 +364,7 @@ AVXcode: 1
364364
# a ModR/M byte.
365365
1a: BNDCL Gv,Ev (F3) | BNDCU Gv,Ev (F2) | BNDMOV Gv,Ev (66) | BNDLDX Gv,Ev
366366
1b: BNDCN Gv,Ev (F2) | BNDMOV Ev,Gv (66) | BNDMK Gv,Ev (F3) | BNDSTX Ev,Gv
367-
1c:
367+
1c: Grp20 (1A),(1C)
368368
1d:
369369
1e:
370370
1f: NOP Ev
@@ -792,6 +792,8 @@ f3: Grp17 (1A)
792792
f5: BZHI Gy,Ey,By (v) | PEXT Gy,By,Ey (F3),(v) | PDEP Gy,By,Ey (F2),(v)
793793
f6: ADCX Gy,Ey (66) | ADOX Gy,Ey (F3) | MULX By,Gy,rDX,Ey (F2),(v)
794794
f7: BEXTR Gy,Ey,By (v) | SHLX Gy,Ey,By (66),(v) | SARX Gy,Ey,By (F3),(v) | SHRX Gy,Ey,By (F2),(v)
795+
f8: MOVDIR64B Gv,Mdqq (66) | ENQCMD Gv,Mdqq (F2) | ENQCMDS Gv,Mdqq (F3)
796+
f9: MOVDIRI My,Gy
795797
EndTable
796798

797799
Table: 3-byte opcode 2 (0x0f 0x3a)
@@ -943,9 +945,9 @@ GrpTable: Grp6
943945
EndTable
944946

945947
GrpTable: Grp7
946-
0: SGDT Ms | VMCALL (001),(11B) | VMLAUNCH (010),(11B) | VMRESUME (011),(11B) | VMXOFF (100),(11B)
947-
1: SIDT Ms | MONITOR (000),(11B) | MWAIT (001),(11B) | CLAC (010),(11B) | STAC (011),(11B)
948-
2: LGDT Ms | XGETBV (000),(11B) | XSETBV (001),(11B) | VMFUNC (100),(11B) | XEND (101)(11B) | XTEST (110)(11B)
948+
0: SGDT Ms | VMCALL (001),(11B) | VMLAUNCH (010),(11B) | VMRESUME (011),(11B) | VMXOFF (100),(11B) | PCONFIG (101),(11B) | ENCLV (000),(11B)
949+
1: SIDT Ms | MONITOR (000),(11B) | MWAIT (001),(11B) | CLAC (010),(11B) | STAC (011),(11B) | ENCLS (111),(11B)
950+
2: LGDT Ms | XGETBV (000),(11B) | XSETBV (001),(11B) | VMFUNC (100),(11B) | XEND (101)(11B) | XTEST (110)(11B) | ENCLU (111),(11B)
949951
3: LIDT Ms
950952
4: SMSW Mw/Rv
951953
5: rdpkru (110),(11B) | wrpkru (111),(11B)
@@ -1020,7 +1022,7 @@ GrpTable: Grp15
10201022
3: vstmxcsr Md (v1) | WRGSBASE Ry (F3),(11B)
10211023
4: XSAVE | ptwrite Ey (F3),(11B)
10221024
5: XRSTOR | lfence (11B)
1023-
6: XSAVEOPT | clwb (66) | mfence (11B)
1025+
6: XSAVEOPT | clwb (66) | mfence (11B) | TPAUSE Rd (66),(11B) | UMONITOR Rv (F3),(11B) | UMWAIT Rd (F2),(11B)
10241026
7: clflush | clflushopt (66) | sfence (11B)
10251027
EndTable
10261028

@@ -1051,6 +1053,10 @@ GrpTable: Grp19
10511053
6: vscatterpf1qps/d Wx (66),(ev)
10521054
EndTable
10531055

1056+
GrpTable: Grp20
1057+
0: cldemote Mb
1058+
EndTable
1059+
10541060
# AMD's Prefetch Group
10551061
GrpTable: GrpP
10561062
0: PREFETCH

tools/lib/traceevent/event-parse.c

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4395,8 +4395,10 @@ static struct tep_print_arg *make_bprint_args(char *fmt, void *data, int size, s
43954395
/* fall through */
43964396
case 'd':
43974397
case 'u':
4398-
case 'x':
43994398
case 'i':
4399+
case 'x':
4400+
case 'X':
4401+
case 'o':
44004402
switch (ls) {
44014403
case 0:
44024404
vsize = 4;
@@ -5078,10 +5080,11 @@ static void pretty_print(struct trace_seq *s, void *data, int size, struct tep_e
50785080

50795081
/* fall through */
50805082
case 'd':
5083+
case 'u':
50815084
case 'i':
50825085
case 'x':
50835086
case 'X':
5084-
case 'u':
5087+
case 'o':
50855088
if (!arg) {
50865089
do_warning_event(event, "no argument match");
50875090
event->flags |= TEP_EVENT_FL_FAILED;

tools/perf/arch/powerpc/util/kvm-stat.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -113,10 +113,10 @@ static int is_tracepoint_available(const char *str, struct evlist *evlist)
113113
struct parse_events_error err;
114114
int ret;
115115

116-
err.str = NULL;
116+
bzero(&err, sizeof(err));
117117
ret = parse_events(evlist, str, &err);
118118
if (err.str)
119-
pr_err("%s : %s\n", str, err.str);
119+
parse_events_print_error(&err, "tracepoint");
120120
return ret;
121121
}
122122

tools/perf/arch/x86/tests/insn-x86-dat-32.c

Lines changed: 52 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1647,6 +1647,12 @@
16471647
"0f ae 30 \txsaveopt (%eax)",},
16481648
{{0x0f, 0xae, 0xf0, }, 3, 0, "", "",
16491649
"0f ae f0 \tmfence ",},
1650+
{{0x0f, 0x1c, 0x00, }, 3, 0, "", "",
1651+
"0f 1c 00 \tcldemote (%eax)",},
1652+
{{0x0f, 0x1c, 0x05, 0x78, 0x56, 0x34, 0x12, }, 7, 0, "", "",
1653+
"0f 1c 05 78 56 34 12 \tcldemote 0x12345678",},
1654+
{{0x0f, 0x1c, 0x84, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",
1655+
"0f 1c 84 c8 78 56 34 12 \tcldemote 0x12345678(%eax,%ecx,8)",},
16501656
{{0x0f, 0xc7, 0x20, }, 3, 0, "", "",
16511657
"0f c7 20 \txsavec (%eax)",},
16521658
{{0x0f, 0xc7, 0x25, 0x78, 0x56, 0x34, 0x12, }, 7, 0, "", "",
@@ -1677,3 +1683,49 @@
16771683
"f3 0f ae 25 78 56 34 12 \tptwritel 0x12345678",},
16781684
{{0xf3, 0x0f, 0xae, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",
16791685
"f3 0f ae a4 c8 78 56 34 12 \tptwritel 0x12345678(%eax,%ecx,8)",},
1686+
{{0x66, 0x0f, 0xae, 0xf3, }, 4, 0, "", "",
1687+
"66 0f ae f3 \ttpause %ebx",},
1688+
{{0x67, 0xf3, 0x0f, 0xae, 0xf0, }, 5, 0, "", "",
1689+
"67 f3 0f ae f0 \tumonitor %ax",},
1690+
{{0xf3, 0x0f, 0xae, 0xf0, }, 4, 0, "", "",
1691+
"f3 0f ae f0 \tumonitor %eax",},
1692+
{{0xf2, 0x0f, 0xae, 0xf0, }, 4, 0, "", "",
1693+
"f2 0f ae f0 \tumwait %eax",},
1694+
{{0x0f, 0x38, 0xf9, 0x03, }, 4, 0, "", "",
1695+
"0f 38 f9 03 \tmovdiri %eax,(%ebx)",},
1696+
{{0x0f, 0x38, 0xf9, 0x88, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",
1697+
"0f 38 f9 88 78 56 34 12 \tmovdiri %ecx,0x12345678(%eax)",},
1698+
{{0x66, 0x0f, 0x38, 0xf8, 0x18, }, 5, 0, "", "",
1699+
"66 0f 38 f8 18 \tmovdir64b (%eax),%ebx",},
1700+
{{0x66, 0x0f, 0x38, 0xf8, 0x88, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",
1701+
"66 0f 38 f8 88 78 56 34 12 \tmovdir64b 0x12345678(%eax),%ecx",},
1702+
{{0x67, 0x66, 0x0f, 0x38, 0xf8, 0x1c, }, 6, 0, "", "",
1703+
"67 66 0f 38 f8 1c \tmovdir64b (%si),%bx",},
1704+
{{0x67, 0x66, 0x0f, 0x38, 0xf8, 0x8c, 0x34, 0x12, }, 8, 0, "", "",
1705+
"67 66 0f 38 f8 8c 34 12 \tmovdir64b 0x1234(%si),%cx",},
1706+
{{0xf2, 0x0f, 0x38, 0xf8, 0x18, }, 5, 0, "", "",
1707+
"f2 0f 38 f8 18 \tenqcmd (%eax),%ebx",},
1708+
{{0xf2, 0x0f, 0x38, 0xf8, 0x88, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",
1709+
"f2 0f 38 f8 88 78 56 34 12 \tenqcmd 0x12345678(%eax),%ecx",},
1710+
{{0x67, 0xf2, 0x0f, 0x38, 0xf8, 0x1c, }, 6, 0, "", "",
1711+
"67 f2 0f 38 f8 1c \tenqcmd (%si),%bx",},
1712+
{{0x67, 0xf2, 0x0f, 0x38, 0xf8, 0x8c, 0x34, 0x12, }, 8, 0, "", "",
1713+
"67 f2 0f 38 f8 8c 34 12 \tenqcmd 0x1234(%si),%cx",},
1714+
{{0xf3, 0x0f, 0x38, 0xf8, 0x18, }, 5, 0, "", "",
1715+
"f3 0f 38 f8 18 \tenqcmds (%eax),%ebx",},
1716+
{{0xf3, 0x0f, 0x38, 0xf8, 0x88, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",
1717+
"f3 0f 38 f8 88 78 56 34 12 \tenqcmds 0x12345678(%eax),%ecx",},
1718+
{{0x67, 0xf3, 0x0f, 0x38, 0xf8, 0x1c, }, 6, 0, "", "",
1719+
"67 f3 0f 38 f8 1c \tenqcmds (%si),%bx",},
1720+
{{0x67, 0xf3, 0x0f, 0x38, 0xf8, 0x8c, 0x34, 0x12, }, 8, 0, "", "",
1721+
"67 f3 0f 38 f8 8c 34 12 \tenqcmds 0x1234(%si),%cx",},
1722+
{{0x0f, 0x01, 0xcf, }, 3, 0, "", "",
1723+
"0f 01 cf \tencls ",},
1724+
{{0x0f, 0x01, 0xd7, }, 3, 0, "", "",
1725+
"0f 01 d7 \tenclu ",},
1726+
{{0x0f, 0x01, 0xc0, }, 3, 0, "", "",
1727+
"0f 01 c0 \tenclv ",},
1728+
{{0x0f, 0x01, 0xc5, }, 3, 0, "", "",
1729+
"0f 01 c5 \tpconfig ",},
1730+
{{0xf3, 0x0f, 0x09, }, 3, 0, "", "",
1731+
"f3 0f 09 \twbnoinvd ",},

tools/perf/arch/x86/tests/insn-x86-dat-64.c

Lines changed: 62 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1667,6 +1667,16 @@
16671667
"41 0f ae 30 \txsaveopt (%r8)",},
16681668
{{0x0f, 0xae, 0xf0, }, 3, 0, "", "",
16691669
"0f ae f0 \tmfence ",},
1670+
{{0x0f, 0x1c, 0x00, }, 3, 0, "", "",
1671+
"0f 1c 00 \tcldemote (%rax)",},
1672+
{{0x41, 0x0f, 0x1c, 0x00, }, 4, 0, "", "",
1673+
"41 0f 1c 00 \tcldemote (%r8)",},
1674+
{{0x0f, 0x1c, 0x04, 0x25, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",
1675+
"0f 1c 04 25 78 56 34 12 \tcldemote 0x12345678",},
1676+
{{0x0f, 0x1c, 0x84, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",
1677+
"0f 1c 84 c8 78 56 34 12 \tcldemote 0x12345678(%rax,%rcx,8)",},
1678+
{{0x41, 0x0f, 0x1c, 0x84, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",
1679+
"41 0f 1c 84 c8 78 56 34 12 \tcldemote 0x12345678(%r8,%rcx,8)",},
16701680
{{0x0f, 0xc7, 0x20, }, 3, 0, "", "",
16711681
"0f c7 20 \txsavec (%rax)",},
16721682
{{0x41, 0x0f, 0xc7, 0x20, }, 4, 0, "", "",
@@ -1727,3 +1737,55 @@
17271737
"f3 48 0f ae a4 c8 78 56 34 12 \tptwriteq 0x12345678(%rax,%rcx,8)",},
17281738
{{0xf3, 0x49, 0x0f, 0xae, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "",
17291739
"f3 49 0f ae a4 c8 78 56 34 12 \tptwriteq 0x12345678(%r8,%rcx,8)",},
1740+
{{0x66, 0x0f, 0xae, 0xf3, }, 4, 0, "", "",
1741+
"66 0f ae f3 \ttpause %ebx",},
1742+
{{0x66, 0x41, 0x0f, 0xae, 0xf0, }, 5, 0, "", "",
1743+
"66 41 0f ae f0 \ttpause %r8d",},
1744+
{{0x67, 0xf3, 0x0f, 0xae, 0xf0, }, 5, 0, "", "",
1745+
"67 f3 0f ae f0 \tumonitor %eax",},
1746+
{{0xf3, 0x0f, 0xae, 0xf0, }, 4, 0, "", "",
1747+
"f3 0f ae f0 \tumonitor %rax",},
1748+
{{0x67, 0xf3, 0x41, 0x0f, 0xae, 0xf0, }, 6, 0, "", "",
1749+
"67 f3 41 0f ae f0 \tumonitor %r8d",},
1750+
{{0xf2, 0x0f, 0xae, 0xf0, }, 4, 0, "", "",
1751+
"f2 0f ae f0 \tumwait %eax",},
1752+
{{0xf2, 0x41, 0x0f, 0xae, 0xf0, }, 5, 0, "", "",
1753+
"f2 41 0f ae f0 \tumwait %r8d",},
1754+
{{0x48, 0x0f, 0x38, 0xf9, 0x03, }, 5, 0, "", "",
1755+
"48 0f 38 f9 03 \tmovdiri %rax,(%rbx)",},
1756+
{{0x48, 0x0f, 0x38, 0xf9, 0x88, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",
1757+
"48 0f 38 f9 88 78 56 34 12 \tmovdiri %rcx,0x12345678(%rax)",},
1758+
{{0x66, 0x0f, 0x38, 0xf8, 0x18, }, 5, 0, "", "",
1759+
"66 0f 38 f8 18 \tmovdir64b (%rax),%rbx",},
1760+
{{0x66, 0x0f, 0x38, 0xf8, 0x88, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",
1761+
"66 0f 38 f8 88 78 56 34 12 \tmovdir64b 0x12345678(%rax),%rcx",},
1762+
{{0x67, 0x66, 0x0f, 0x38, 0xf8, 0x18, }, 6, 0, "", "",
1763+
"67 66 0f 38 f8 18 \tmovdir64b (%eax),%ebx",},
1764+
{{0x67, 0x66, 0x0f, 0x38, 0xf8, 0x88, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "",
1765+
"67 66 0f 38 f8 88 78 56 34 12 \tmovdir64b 0x12345678(%eax),%ecx",},
1766+
{{0xf2, 0x0f, 0x38, 0xf8, 0x18, }, 5, 0, "", "",
1767+
"f2 0f 38 f8 18 \tenqcmd (%rax),%rbx",},
1768+
{{0xf2, 0x0f, 0x38, 0xf8, 0x88, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",
1769+
"f2 0f 38 f8 88 78 56 34 12 \tenqcmd 0x12345678(%rax),%rcx",},
1770+
{{0x67, 0xf2, 0x0f, 0x38, 0xf8, 0x18, }, 6, 0, "", "",
1771+
"67 f2 0f 38 f8 18 \tenqcmd (%eax),%ebx",},
1772+
{{0x67, 0xf2, 0x0f, 0x38, 0xf8, 0x88, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "",
1773+
"67 f2 0f 38 f8 88 78 56 34 12 \tenqcmd 0x12345678(%eax),%ecx",},
1774+
{{0xf3, 0x0f, 0x38, 0xf8, 0x18, }, 5, 0, "", "",
1775+
"f3 0f 38 f8 18 \tenqcmds (%rax),%rbx",},
1776+
{{0xf3, 0x0f, 0x38, 0xf8, 0x88, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",
1777+
"f3 0f 38 f8 88 78 56 34 12 \tenqcmds 0x12345678(%rax),%rcx",},
1778+
{{0x67, 0xf3, 0x0f, 0x38, 0xf8, 0x18, }, 6, 0, "", "",
1779+
"67 f3 0f 38 f8 18 \tenqcmds (%eax),%ebx",},
1780+
{{0x67, 0xf3, 0x0f, 0x38, 0xf8, 0x88, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "",
1781+
"67 f3 0f 38 f8 88 78 56 34 12 \tenqcmds 0x12345678(%eax),%ecx",},
1782+
{{0x0f, 0x01, 0xcf, }, 3, 0, "", "",
1783+
"0f 01 cf \tencls ",},
1784+
{{0x0f, 0x01, 0xd7, }, 3, 0, "", "",
1785+
"0f 01 d7 \tenclu ",},
1786+
{{0x0f, 0x01, 0xc0, }, 3, 0, "", "",
1787+
"0f 01 c0 \tenclv ",},
1788+
{{0x0f, 0x01, 0xc5, }, 3, 0, "", "",
1789+
"0f 01 c5 \tpconfig ",},
1790+
{{0xf3, 0x0f, 0x09, }, 3, 0, "", "",
1791+
"f3 0f 09 \twbnoinvd ",},

0 commit comments

Comments
 (0)