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bbrezillonmiquelraynal
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mtd: rawnand: fsl_upm: Get rid of the legacy interface implementation
Now that the driver implements exec_op(), we can get rid of the legacy interface implementation. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
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drivers/mtd/nand/raw/fsl_upm.c

Lines changed: 0 additions & 133 deletions
Original file line numberDiff line numberDiff line change
@@ -19,15 +19,10 @@
1919
#include <linux/slab.h>
2020
#include <asm/fsl_lbc.h>
2121

22-
#define FSL_UPM_WAIT_RUN_PATTERN 0x1
23-
#define FSL_UPM_WAIT_WRITE_BYTE 0x2
24-
#define FSL_UPM_WAIT_WRITE_BUFFER 0x4
25-
2622
struct fsl_upm_nand {
2723
struct nand_controller base;
2824
struct device *dev;
2925
struct nand_chip chip;
30-
int last_ctrl;
3126
struct fsl_upm upm;
3227
uint8_t upm_addr_offset;
3328
uint8_t upm_cmd_offset;
@@ -36,8 +31,6 @@ struct fsl_upm_nand {
3631
uint32_t mchip_offsets[NAND_MAX_CHIPS];
3732
uint32_t mchip_count;
3833
uint32_t mchip_number;
39-
int chip_delay;
40-
uint32_t wait_flags;
4134
};
4235

4336
static inline struct fsl_upm_nand *to_fsl_upm_nand(struct mtd_info *mtdinfo)
@@ -46,105 +39,6 @@ static inline struct fsl_upm_nand *to_fsl_upm_nand(struct mtd_info *mtdinfo)
4639
chip);
4740
}
4841

49-
static int fun_chip_ready(struct nand_chip *chip)
50-
{
51-
struct fsl_upm_nand *fun = to_fsl_upm_nand(nand_to_mtd(chip));
52-
53-
if (gpiod_get_value(fun->rnb_gpio[fun->mchip_number]))
54-
return 1;
55-
56-
dev_vdbg(fun->dev, "busy\n");
57-
return 0;
58-
}
59-
60-
static void fun_wait_rnb(struct fsl_upm_nand *fun)
61-
{
62-
if (fun->rnb_gpio[fun->mchip_number] >= 0) {
63-
int cnt = 1000000;
64-
65-
while (--cnt && !fun_chip_ready(&fun->chip))
66-
cpu_relax();
67-
if (!cnt)
68-
dev_err(fun->dev, "tired waiting for RNB\n");
69-
} else {
70-
ndelay(100);
71-
}
72-
}
73-
74-
static void fun_cmd_ctrl(struct nand_chip *chip, int cmd, unsigned int ctrl)
75-
{
76-
struct fsl_upm_nand *fun = to_fsl_upm_nand(nand_to_mtd(chip));
77-
u32 mar;
78-
79-
if (!(ctrl & fun->last_ctrl)) {
80-
fsl_upm_end_pattern(&fun->upm);
81-
82-
if (cmd == NAND_CMD_NONE)
83-
return;
84-
85-
fun->last_ctrl = ctrl & (NAND_ALE | NAND_CLE);
86-
}
87-
88-
if (ctrl & NAND_CTRL_CHANGE) {
89-
if (ctrl & NAND_ALE)
90-
fsl_upm_start_pattern(&fun->upm, fun->upm_addr_offset);
91-
else if (ctrl & NAND_CLE)
92-
fsl_upm_start_pattern(&fun->upm, fun->upm_cmd_offset);
93-
}
94-
95-
mar = (cmd << (32 - fun->upm.width)) |
96-
fun->mchip_offsets[fun->mchip_number];
97-
fsl_upm_run_pattern(&fun->upm, chip->legacy.IO_ADDR_R, mar);
98-
99-
if (fun->wait_flags & FSL_UPM_WAIT_RUN_PATTERN)
100-
fun_wait_rnb(fun);
101-
}
102-
103-
static void fun_select_chip(struct nand_chip *chip, int mchip_nr)
104-
{
105-
struct fsl_upm_nand *fun = to_fsl_upm_nand(nand_to_mtd(chip));
106-
107-
if (mchip_nr == -1) {
108-
chip->legacy.cmd_ctrl(chip, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE);
109-
} else if (mchip_nr >= 0 && mchip_nr < NAND_MAX_CHIPS) {
110-
fun->mchip_number = mchip_nr;
111-
chip->legacy.IO_ADDR_R = fun->io_base + fun->mchip_offsets[mchip_nr];
112-
chip->legacy.IO_ADDR_W = chip->legacy.IO_ADDR_R;
113-
} else {
114-
BUG();
115-
}
116-
}
117-
118-
static uint8_t fun_read_byte(struct nand_chip *chip)
119-
{
120-
struct fsl_upm_nand *fun = to_fsl_upm_nand(nand_to_mtd(chip));
121-
122-
return in_8(fun->chip.legacy.IO_ADDR_R);
123-
}
124-
125-
static void fun_read_buf(struct nand_chip *chip, uint8_t *buf, int len)
126-
{
127-
struct fsl_upm_nand *fun = to_fsl_upm_nand(nand_to_mtd(chip));
128-
int i;
129-
130-
for (i = 0; i < len; i++)
131-
buf[i] = in_8(fun->chip.legacy.IO_ADDR_R);
132-
}
133-
134-
static void fun_write_buf(struct nand_chip *chip, const uint8_t *buf, int len)
135-
{
136-
struct fsl_upm_nand *fun = to_fsl_upm_nand(nand_to_mtd(chip));
137-
int i;
138-
139-
for (i = 0; i < len; i++) {
140-
out_8(fun->chip.legacy.IO_ADDR_W, buf[i]);
141-
if (fun->wait_flags & FSL_UPM_WAIT_WRITE_BYTE)
142-
fun_wait_rnb(fun);
143-
}
144-
if (fun->wait_flags & FSL_UPM_WAIT_WRITE_BUFFER)
145-
fun_wait_rnb(fun);
146-
}
147-
14842
static int fun_chip_init(struct fsl_upm_nand *fun,
14943
const struct device_node *upm_np,
15044
const struct resource *io_res)
@@ -153,21 +47,8 @@ static int fun_chip_init(struct fsl_upm_nand *fun,
15347
int ret;
15448
struct device_node *flash_np;
15549

156-
fun->chip.legacy.IO_ADDR_R = fun->io_base;
157-
fun->chip.legacy.IO_ADDR_W = fun->io_base;
158-
fun->chip.legacy.cmd_ctrl = fun_cmd_ctrl;
159-
fun->chip.legacy.chip_delay = fun->chip_delay;
160-
fun->chip.legacy.read_byte = fun_read_byte;
161-
fun->chip.legacy.read_buf = fun_read_buf;
162-
fun->chip.legacy.write_buf = fun_write_buf;
16350
fun->chip.ecc.mode = NAND_ECC_SOFT;
16451
fun->chip.ecc.algo = NAND_ECC_HAMMING;
165-
if (fun->mchip_count > 1)
166-
fun->chip.legacy.select_chip = fun_select_chip;
167-
168-
if (!fun->rnb_gpio[0])
169-
fun->chip.legacy.dev_ready = fun_chip_ready;
170-
17152
fun->chip.controller = &fun->base;
17253
mtd->dev.parent = fun->dev;
17354

@@ -342,23 +223,9 @@ static int fun_probe(struct platform_device *ofdev)
342223
}
343224
}
344225

345-
prop = of_get_property(ofdev->dev.of_node, "chip-delay", NULL);
346-
if (prop)
347-
fun->chip_delay = be32_to_cpup(prop);
348-
else
349-
fun->chip_delay = 50;
350-
351-
prop = of_get_property(ofdev->dev.of_node, "fsl,upm-wait-flags", &size);
352-
if (prop && size == sizeof(uint32_t))
353-
fun->wait_flags = be32_to_cpup(prop);
354-
else
355-
fun->wait_flags = FSL_UPM_WAIT_RUN_PATTERN |
356-
FSL_UPM_WAIT_WRITE_BYTE;
357-
358226
nand_controller_init(&fun->base);
359227
fun->base.ops = &fun_ops;
360228
fun->dev = &ofdev->dev;
361-
fun->last_ctrl = NAND_CLE;
362229

363230
ret = fun_chip_init(fun, ofdev->dev.of_node, io_res);
364231
if (ret)

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