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#include <linux/slab.h>
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#include <asm/fsl_lbc.h>
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- #define FSL_UPM_WAIT_RUN_PATTERN 0x1
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- #define FSL_UPM_WAIT_WRITE_BYTE 0x2
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- #define FSL_UPM_WAIT_WRITE_BUFFER 0x4
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-
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struct fsl_upm_nand {
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struct nand_controller base ;
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struct device * dev ;
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struct nand_chip chip ;
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- int last_ctrl ;
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struct fsl_upm upm ;
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uint8_t upm_addr_offset ;
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uint8_t upm_cmd_offset ;
@@ -36,8 +31,6 @@ struct fsl_upm_nand {
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uint32_t mchip_offsets [NAND_MAX_CHIPS ];
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uint32_t mchip_count ;
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uint32_t mchip_number ;
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- int chip_delay ;
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- uint32_t wait_flags ;
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};
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static inline struct fsl_upm_nand * to_fsl_upm_nand (struct mtd_info * mtdinfo )
@@ -46,105 +39,6 @@ static inline struct fsl_upm_nand *to_fsl_upm_nand(struct mtd_info *mtdinfo)
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chip );
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}
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- static int fun_chip_ready (struct nand_chip * chip )
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- {
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- struct fsl_upm_nand * fun = to_fsl_upm_nand (nand_to_mtd (chip ));
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-
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- if (gpiod_get_value (fun -> rnb_gpio [fun -> mchip_number ]))
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- return 1 ;
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-
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- dev_vdbg (fun -> dev , "busy\n" );
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- return 0 ;
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- }
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-
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- static void fun_wait_rnb (struct fsl_upm_nand * fun )
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- {
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- if (fun -> rnb_gpio [fun -> mchip_number ] >= 0 ) {
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- int cnt = 1000000 ;
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-
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- while (-- cnt && !fun_chip_ready (& fun -> chip ))
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- cpu_relax ();
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- if (!cnt )
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- dev_err (fun -> dev , "tired waiting for RNB\n" );
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- } else {
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- ndelay (100 );
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- }
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- }
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-
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- static void fun_cmd_ctrl (struct nand_chip * chip , int cmd , unsigned int ctrl )
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- {
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- struct fsl_upm_nand * fun = to_fsl_upm_nand (nand_to_mtd (chip ));
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- u32 mar ;
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-
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- if (!(ctrl & fun -> last_ctrl )) {
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- fsl_upm_end_pattern (& fun -> upm );
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-
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- if (cmd == NAND_CMD_NONE )
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- return ;
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-
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- fun -> last_ctrl = ctrl & (NAND_ALE | NAND_CLE );
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- }
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-
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- if (ctrl & NAND_CTRL_CHANGE ) {
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- if (ctrl & NAND_ALE )
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- fsl_upm_start_pattern (& fun -> upm , fun -> upm_addr_offset );
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- else if (ctrl & NAND_CLE )
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- fsl_upm_start_pattern (& fun -> upm , fun -> upm_cmd_offset );
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- }
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-
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- mar = (cmd << (32 - fun -> upm .width )) |
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- fun -> mchip_offsets [fun -> mchip_number ];
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- fsl_upm_run_pattern (& fun -> upm , chip -> legacy .IO_ADDR_R , mar );
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-
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- if (fun -> wait_flags & FSL_UPM_WAIT_RUN_PATTERN )
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- fun_wait_rnb (fun );
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- }
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-
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- static void fun_select_chip (struct nand_chip * chip , int mchip_nr )
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- {
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- struct fsl_upm_nand * fun = to_fsl_upm_nand (nand_to_mtd (chip ));
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-
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- if (mchip_nr == -1 ) {
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- chip -> legacy .cmd_ctrl (chip , NAND_CMD_NONE , 0 | NAND_CTRL_CHANGE );
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- } else if (mchip_nr >= 0 && mchip_nr < NAND_MAX_CHIPS ) {
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- fun -> mchip_number = mchip_nr ;
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- chip -> legacy .IO_ADDR_R = fun -> io_base + fun -> mchip_offsets [mchip_nr ];
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- chip -> legacy .IO_ADDR_W = chip -> legacy .IO_ADDR_R ;
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- } else {
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- BUG ();
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- }
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- }
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-
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- static uint8_t fun_read_byte (struct nand_chip * chip )
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- {
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- struct fsl_upm_nand * fun = to_fsl_upm_nand (nand_to_mtd (chip ));
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-
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- return in_8 (fun -> chip .legacy .IO_ADDR_R );
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- }
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-
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- static void fun_read_buf (struct nand_chip * chip , uint8_t * buf , int len )
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- {
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- struct fsl_upm_nand * fun = to_fsl_upm_nand (nand_to_mtd (chip ));
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- int i ;
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-
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- for (i = 0 ; i < len ; i ++ )
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- buf [i ] = in_8 (fun -> chip .legacy .IO_ADDR_R );
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- }
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-
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- static void fun_write_buf (struct nand_chip * chip , const uint8_t * buf , int len )
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- {
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- struct fsl_upm_nand * fun = to_fsl_upm_nand (nand_to_mtd (chip ));
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- int i ;
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-
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- for (i = 0 ; i < len ; i ++ ) {
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- out_8 (fun -> chip .legacy .IO_ADDR_W , buf [i ]);
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- if (fun -> wait_flags & FSL_UPM_WAIT_WRITE_BYTE )
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- fun_wait_rnb (fun );
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- }
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- if (fun -> wait_flags & FSL_UPM_WAIT_WRITE_BUFFER )
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- fun_wait_rnb (fun );
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- }
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-
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static int fun_chip_init (struct fsl_upm_nand * fun ,
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const struct device_node * upm_np ,
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const struct resource * io_res )
@@ -153,21 +47,8 @@ static int fun_chip_init(struct fsl_upm_nand *fun,
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int ret ;
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struct device_node * flash_np ;
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- fun -> chip .legacy .IO_ADDR_R = fun -> io_base ;
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- fun -> chip .legacy .IO_ADDR_W = fun -> io_base ;
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- fun -> chip .legacy .cmd_ctrl = fun_cmd_ctrl ;
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- fun -> chip .legacy .chip_delay = fun -> chip_delay ;
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- fun -> chip .legacy .read_byte = fun_read_byte ;
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- fun -> chip .legacy .read_buf = fun_read_buf ;
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- fun -> chip .legacy .write_buf = fun_write_buf ;
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fun -> chip .ecc .mode = NAND_ECC_SOFT ;
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fun -> chip .ecc .algo = NAND_ECC_HAMMING ;
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- if (fun -> mchip_count > 1 )
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- fun -> chip .legacy .select_chip = fun_select_chip ;
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-
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- if (!fun -> rnb_gpio [0 ])
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- fun -> chip .legacy .dev_ready = fun_chip_ready ;
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-
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fun -> chip .controller = & fun -> base ;
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mtd -> dev .parent = fun -> dev ;
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@@ -342,23 +223,9 @@ static int fun_probe(struct platform_device *ofdev)
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}
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}
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- prop = of_get_property (ofdev -> dev .of_node , "chip-delay" , NULL );
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- if (prop )
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- fun -> chip_delay = be32_to_cpup (prop );
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- else
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- fun -> chip_delay = 50 ;
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-
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- prop = of_get_property (ofdev -> dev .of_node , "fsl,upm-wait-flags" , & size );
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- if (prop && size == sizeof (uint32_t ))
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- fun -> wait_flags = be32_to_cpup (prop );
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- else
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- fun -> wait_flags = FSL_UPM_WAIT_RUN_PATTERN |
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- FSL_UPM_WAIT_WRITE_BYTE ;
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-
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nand_controller_init (& fun -> base );
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fun -> base .ops = & fun_ops ;
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fun -> dev = & ofdev -> dev ;
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- fun -> last_ctrl = NAND_CLE ;
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ret = fun_chip_init (fun , ofdev -> dev .of_node , io_res );
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if (ret )
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