@@ -831,6 +831,25 @@ struct clk *clk_register_divider_table(struct device *dev, const char *name,
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__devm_clk_hw_register_divider((dev), NULL, (name), (parent_name), NULL, \
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NULL, (flags), (reg), (shift), (width), \
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(clk_divider_flags), NULL, (lock))
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+ /**
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+ * devm_clk_hw_register_divider_parent_hw - register a divider clock with the clock framework
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+ * @dev: device registering this clock
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+ * @name: name of this clock
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+ * @parent_hw: pointer to parent clk
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+ * @flags: framework-specific flags
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+ * @reg: register address to adjust divider
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+ * @shift: number of bits to shift the bitfield
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+ * @width: width of the bitfield
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+ * @clk_divider_flags: divider-specific flags for this clock
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+ * @lock: shared register lock for this clock
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+ */
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+ #define devm_clk_hw_register_divider_parent_hw (dev , name , parent_hw , flags , \
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+ reg , shift , width , \
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+ clk_divider_flags , lock ) \
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+ __devm_clk_hw_register_divider((dev), NULL, (name), NULL, \
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+ (parent_hw), NULL, (flags), (reg), \
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+ (shift), (width), (clk_divider_flags), \
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+ NULL, (lock))
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/**
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* devm_clk_hw_register_divider_table - register a table based divider clock
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* with the clock framework (devres variant)
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