Skip to content

Commit 9279c00

Browse files
Aidan MacDonaldlinusw
authored andcommitted
pinctrl: ingenic: Fix regmap on X series SoCs
The X series Ingenic SoCs have a shadow GPIO group which is at a higher offset than the other groups, and is used for all GPIO configuration. The regmap did not take this offset into account and set max_register too low, so the regmap API blocked writes to the shadow group, which made the pinctrl driver unable to configure any pins. Fix this by adding regmap access tables to the chip info. The way that max_register was computed was also off by one, since max_register is an inclusive bound, not an exclusive bound; this has been fixed. Cc: [email protected] Signed-off-by: Aidan MacDonald <[email protected]> Fixes: 6626a76 ("pinctrl: ingenic: Add .max_register in regmap_config") Reviewed-by: Paul Cercueil <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
1 parent 283fb4e commit 9279c00

File tree

1 file changed

+45
-1
lines changed

1 file changed

+45
-1
lines changed

drivers/pinctrl/pinctrl-ingenic.c

Lines changed: 45 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -119,6 +119,8 @@ struct ingenic_chip_info {
119119
unsigned int num_functions;
120120

121121
const u32 *pull_ups, *pull_downs;
122+
123+
const struct regmap_access_table *access_table;
122124
};
123125

124126
struct ingenic_pinctrl {
@@ -2179,6 +2181,17 @@ static const struct function_desc x1000_functions[] = {
21792181
{ "mac", x1000_mac_groups, ARRAY_SIZE(x1000_mac_groups), },
21802182
};
21812183

2184+
static const struct regmap_range x1000_access_ranges[] = {
2185+
regmap_reg_range(0x000, 0x400 - 4),
2186+
regmap_reg_range(0x700, 0x800 - 4),
2187+
};
2188+
2189+
/* shared with X1500 */
2190+
static const struct regmap_access_table x1000_access_table = {
2191+
.yes_ranges = x1000_access_ranges,
2192+
.n_yes_ranges = ARRAY_SIZE(x1000_access_ranges),
2193+
};
2194+
21822195
static const struct ingenic_chip_info x1000_chip_info = {
21832196
.num_chips = 4,
21842197
.reg_offset = 0x100,
@@ -2189,6 +2202,7 @@ static const struct ingenic_chip_info x1000_chip_info = {
21892202
.num_functions = ARRAY_SIZE(x1000_functions),
21902203
.pull_ups = x1000_pull_ups,
21912204
.pull_downs = x1000_pull_downs,
2205+
.access_table = &x1000_access_table,
21922206
};
21932207

21942208
static int x1500_uart0_data_pins[] = { 0x4a, 0x4b, };
@@ -2300,6 +2314,7 @@ static const struct ingenic_chip_info x1500_chip_info = {
23002314
.num_functions = ARRAY_SIZE(x1500_functions),
23012315
.pull_ups = x1000_pull_ups,
23022316
.pull_downs = x1000_pull_downs,
2317+
.access_table = &x1000_access_table,
23032318
};
23042319

23052320
static const u32 x1830_pull_ups[4] = {
@@ -2506,6 +2521,16 @@ static const struct function_desc x1830_functions[] = {
25062521
{ "mac", x1830_mac_groups, ARRAY_SIZE(x1830_mac_groups), },
25072522
};
25082523

2524+
static const struct regmap_range x1830_access_ranges[] = {
2525+
regmap_reg_range(0x0000, 0x4000 - 4),
2526+
regmap_reg_range(0x7000, 0x8000 - 4),
2527+
};
2528+
2529+
static const struct regmap_access_table x1830_access_table = {
2530+
.yes_ranges = x1830_access_ranges,
2531+
.n_yes_ranges = ARRAY_SIZE(x1830_access_ranges),
2532+
};
2533+
25092534
static const struct ingenic_chip_info x1830_chip_info = {
25102535
.num_chips = 4,
25112536
.reg_offset = 0x1000,
@@ -2516,6 +2541,7 @@ static const struct ingenic_chip_info x1830_chip_info = {
25162541
.num_functions = ARRAY_SIZE(x1830_functions),
25172542
.pull_ups = x1830_pull_ups,
25182543
.pull_downs = x1830_pull_downs,
2544+
.access_table = &x1830_access_table,
25192545
};
25202546

25212547
static const u32 x2000_pull_ups[5] = {
@@ -2969,6 +2995,17 @@ static const struct function_desc x2000_functions[] = {
29692995
{ "otg", x2000_otg_groups, ARRAY_SIZE(x2000_otg_groups), },
29702996
};
29712997

2998+
static const struct regmap_range x2000_access_ranges[] = {
2999+
regmap_reg_range(0x000, 0x500 - 4),
3000+
regmap_reg_range(0x700, 0x800 - 4),
3001+
};
3002+
3003+
/* shared with X2100 */
3004+
static const struct regmap_access_table x2000_access_table = {
3005+
.yes_ranges = x2000_access_ranges,
3006+
.n_yes_ranges = ARRAY_SIZE(x2000_access_ranges),
3007+
};
3008+
29723009
static const struct ingenic_chip_info x2000_chip_info = {
29733010
.num_chips = 5,
29743011
.reg_offset = 0x100,
@@ -2979,6 +3016,7 @@ static const struct ingenic_chip_info x2000_chip_info = {
29793016
.num_functions = ARRAY_SIZE(x2000_functions),
29803017
.pull_ups = x2000_pull_ups,
29813018
.pull_downs = x2000_pull_downs,
3019+
.access_table = &x2000_access_table,
29823020
};
29833021

29843022
static const u32 x2100_pull_ups[5] = {
@@ -3189,6 +3227,7 @@ static const struct ingenic_chip_info x2100_chip_info = {
31893227
.num_functions = ARRAY_SIZE(x2100_functions),
31903228
.pull_ups = x2100_pull_ups,
31913229
.pull_downs = x2100_pull_downs,
3230+
.access_table = &x2000_access_table,
31923231
};
31933232

31943233
static u32 ingenic_gpio_read_reg(struct ingenic_gpio_chip *jzgc, u8 reg)
@@ -4168,7 +4207,12 @@ static int __init ingenic_pinctrl_probe(struct platform_device *pdev)
41684207
return PTR_ERR(base);
41694208

41704209
regmap_config = ingenic_pinctrl_regmap_config;
4171-
regmap_config.max_register = chip_info->num_chips * chip_info->reg_offset;
4210+
if (chip_info->access_table) {
4211+
regmap_config.rd_table = chip_info->access_table;
4212+
regmap_config.wr_table = chip_info->access_table;
4213+
} else {
4214+
regmap_config.max_register = chip_info->num_chips * chip_info->reg_offset - 4;
4215+
}
41724216

41734217
jzpc->map = devm_regmap_init_mmio(dev, base, &regmap_config);
41744218
if (IS_ERR(jzpc->map)) {

0 commit comments

Comments
 (0)