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bhadanednyaneshwarRadhakrishna Sripada
bhadanednyaneshwar
authored and
Radhakrishna Sripada
committed
drm/i915/hsw: s/HSW/HASWELL for platform/subplatform defines
Follow consistent naming convention. Replace HSW with HASWELL. Signed-off-by: Dnyaneshwar Bhadane <[email protected]> Reviewed-by: Anusha Srivatsa <[email protected]> Acked-by: Jani Nikula <[email protected]> Signed-off-by: Radhakrishna Sripada <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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+19
-19
lines changed

10 files changed

+19
-19
lines changed

‎drivers/gpu/drm/i915/display/intel_cdclk.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -470,7 +470,7 @@ static void hsw_get_cdclk(struct drm_i915_private *dev_priv,
470470
cdclk_config->cdclk = 450000;
471471
else if (freq == LCPLL_CLK_FREQ_450)
472472
cdclk_config->cdclk = 450000;
473-
else if (IS_HSW_ULT(dev_priv))
473+
else if (IS_HASWELL_ULT(dev_priv))
474474
cdclk_config->cdclk = 337500;
475475
else
476476
cdclk_config->cdclk = 540000;

‎drivers/gpu/drm/i915/display/intel_display.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7377,7 +7377,7 @@ static bool intel_ddi_crt_present(struct drm_i915_private *dev_priv)
73777377
if (DISPLAY_VER(dev_priv) >= 9)
73787378
return false;
73797379

7380-
if (IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv))
7380+
if (IS_HASWELL_ULT(dev_priv) || IS_BDW_ULT(dev_priv))
73817381
return false;
73827382

73837383
if (HAS_PCH_LPT_H(dev_priv) &&

‎drivers/gpu/drm/i915/display/intel_display_device.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -54,7 +54,7 @@ struct drm_printer;
5454
#define HAS_GMCH(i915) (DISPLAY_INFO(i915)->has_gmch)
5555
#define HAS_HW_SAGV_WM(i915) (DISPLAY_VER(i915) >= 13 && !IS_DGFX(i915))
5656
#define HAS_IPC(i915) (DISPLAY_INFO(i915)->has_ipc)
57-
#define HAS_IPS(i915) (IS_HSW_ULT(i915) || IS_BROADWELL(i915))
57+
#define HAS_IPS(i915) (IS_HASWELL_ULT(i915) || IS_BROADWELL(i915))
5858
#define HAS_LSPCON(i915) (IS_DISPLAY_VER(i915, 9, 10))
5959
#define HAS_MBUS_JOINING(i915) (IS_ALDERLAKE_P(i915) || DISPLAY_VER(i915) >= 14)
6060
#define HAS_MSO(i915) (DISPLAY_VER(i915) >= 12)

‎drivers/gpu/drm/i915/display/intel_dp.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -510,7 +510,7 @@ intel_dp_set_source_rates(struct intel_dp *intel_dp)
510510
} else if (DISPLAY_VER(dev_priv) == 9) {
511511
source_rates = skl_rates;
512512
size = ARRAY_SIZE(skl_rates);
513-
} else if ((IS_HASWELL(dev_priv) && !IS_HSW_ULX(dev_priv)) ||
513+
} else if ((IS_HASWELL(dev_priv) && !IS_HASWELL_ULX(dev_priv)) ||
514514
IS_BROADWELL(dev_priv)) {
515515
source_rates = hsw_rates;
516516
size = ARRAY_SIZE(hsw_rates);

‎drivers/gpu/drm/i915/display/intel_dpll_mgr.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -927,7 +927,7 @@ static int hsw_ddi_wrpll_get_freq(struct drm_i915_private *dev_priv,
927927
switch (wrpll & WRPLL_REF_MASK) {
928928
case WRPLL_REF_SPECIAL_HSW:
929929
/* Muxed-SSC for BDW, non-SSC for non-ULT HSW. */
930-
if (IS_HASWELL(dev_priv) && !IS_HSW_ULT(dev_priv)) {
930+
if (IS_HASWELL(dev_priv) && !IS_HASWELL_ULT(dev_priv)) {
931931
refclk = dev_priv->display.dpll.ref_clks.nssc;
932932
break;
933933
}

‎drivers/gpu/drm/i915/display/intel_pch_refclk.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -423,7 +423,7 @@ static bool wrpll_uses_pch_ssc(struct drm_i915_private *dev_priv,
423423
if ((ctl & WRPLL_REF_MASK) == WRPLL_REF_PCH_SSC)
424424
return true;
425425

426-
if ((IS_BROADWELL(dev_priv) || IS_HSW_ULT(dev_priv)) &&
426+
if ((IS_BROADWELL(dev_priv) || IS_HASWELL_ULT(dev_priv)) &&
427427
(ctl & WRPLL_REF_MASK) == WRPLL_REF_MUXED_SSC_BDW &&
428428
(fuse_strap & HSW_CPU_SSC_ENABLE) == 0)
429429
return true;

‎drivers/gpu/drm/i915/gt/intel_gt.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -179,7 +179,7 @@ int intel_gt_init_hw(struct intel_gt *gt)
179179
if (IS_HASWELL(i915))
180180
intel_uncore_write(uncore,
181181
HSW_MI_PREDICATE_RESULT_2,
182-
IS_HSW_GT3(i915) ?
182+
IS_HASWELL_GT3(i915) ?
183183
LOWER_SLICE_ENABLED : LOWER_SLICE_DISABLED);
184184

185185
/* Apply the GT workarounds... */

‎drivers/gpu/drm/i915/i915_driver.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -175,7 +175,7 @@ static void intel_detect_preproduction_hw(struct drm_i915_private *dev_priv)
175175
{
176176
bool pre = false;
177177

178-
pre |= IS_HSW_EARLY_SDV(dev_priv);
178+
pre |= IS_HASWELL_EARLY_SDV(dev_priv);
179179
pre |= IS_SKYLAKE(dev_priv) && INTEL_REVID(dev_priv) < 0x6;
180180
pre |= IS_BROXTON(dev_priv) && INTEL_REVID(dev_priv) < 0xA;
181181
pre |= IS_KABYLAKE(dev_priv) && INTEL_REVID(dev_priv) < 0x1;

‎drivers/gpu/drm/i915/i915_drv.h

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -591,22 +591,22 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
591591
IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_RPL)
592592
#define IS_ADLP_RPLU(i915) \
593593
IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_RPLU)
594-
#define IS_HSW_EARLY_SDV(i915) (IS_HASWELL(i915) && \
594+
#define IS_HASWELL_EARLY_SDV(i915) (IS_HASWELL(i915) && \
595595
(INTEL_DEVID(i915) & 0xFF00) == 0x0C00)
596596
#define IS_BDW_ULT(i915) \
597597
IS_SUBPLATFORM(i915, INTEL_BROADWELL, INTEL_SUBPLATFORM_ULT)
598598
#define IS_BDW_ULX(i915) \
599599
IS_SUBPLATFORM(i915, INTEL_BROADWELL, INTEL_SUBPLATFORM_ULX)
600600
#define IS_BDW_GT3(i915) (IS_BROADWELL(i915) && \
601601
INTEL_INFO(i915)->gt == 3)
602-
#define IS_HSW_ULT(i915) \
602+
#define IS_HASWELL_ULT(i915) \
603603
IS_SUBPLATFORM(i915, INTEL_HASWELL, INTEL_SUBPLATFORM_ULT)
604-
#define IS_HSW_GT3(i915) (IS_HASWELL(i915) && \
604+
#define IS_HASWELL_GT3(i915) (IS_HASWELL(i915) && \
605605
INTEL_INFO(i915)->gt == 3)
606-
#define IS_HSW_GT1(i915) (IS_HASWELL(i915) && \
606+
#define IS_HASWELL_GT1(i915) (IS_HASWELL(i915) && \
607607
INTEL_INFO(i915)->gt == 1)
608608
/* ULX machines are also considered ULT. */
609-
#define IS_HSW_ULX(i915) \
609+
#define IS_HASWELL_ULX(i915) \
610610
IS_SUBPLATFORM(i915, INTEL_HASWELL, INTEL_SUBPLATFORM_ULX)
611611
#define IS_SKL_ULT(i915) \
612612
IS_SUBPLATFORM(i915, INTEL_SKYLAKE, INTEL_SUBPLATFORM_ULT)
@@ -860,7 +860,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
860860

861861
/* DPF == dynamic parity feature */
862862
#define HAS_L3_DPF(i915) (INTEL_INFO(i915)->has_l3_dpf)
863-
#define NUM_L3_SLICES(i915) (IS_HSW_GT3(i915) ? \
863+
#define NUM_L3_SLICES(i915) (IS_HASWELL_GT3(i915) ? \
864864
2 : HAS_L3_DPF(i915))
865865

866866
/* Only valid when HAS_DISPLAY() is true */

‎drivers/gpu/drm/i915/soc/intel_pch.c

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -32,29 +32,29 @@ intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id)
3232
drm_WARN_ON(&dev_priv->drm,
3333
!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
3434
drm_WARN_ON(&dev_priv->drm,
35-
IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv));
35+
IS_HASWELL_ULT(dev_priv) || IS_BDW_ULT(dev_priv));
3636
return PCH_LPT;
3737
case INTEL_PCH_LPT_LP_DEVICE_ID_TYPE:
3838
drm_dbg_kms(&dev_priv->drm, "Found LynxPoint LP PCH\n");
3939
drm_WARN_ON(&dev_priv->drm,
4040
!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
4141
drm_WARN_ON(&dev_priv->drm,
42-
!IS_HSW_ULT(dev_priv) && !IS_BDW_ULT(dev_priv));
42+
!IS_HASWELL_ULT(dev_priv) && !IS_BDW_ULT(dev_priv));
4343
return PCH_LPT;
4444
case INTEL_PCH_WPT_DEVICE_ID_TYPE:
4545
drm_dbg_kms(&dev_priv->drm, "Found WildcatPoint PCH\n");
4646
drm_WARN_ON(&dev_priv->drm,
4747
!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
4848
drm_WARN_ON(&dev_priv->drm,
49-
IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv));
49+
IS_HASWELL_ULT(dev_priv) || IS_BDW_ULT(dev_priv));
5050
/* WPT is LPT compatible */
5151
return PCH_LPT;
5252
case INTEL_PCH_WPT_LP_DEVICE_ID_TYPE:
5353
drm_dbg_kms(&dev_priv->drm, "Found WildcatPoint LP PCH\n");
5454
drm_WARN_ON(&dev_priv->drm,
5555
!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
5656
drm_WARN_ON(&dev_priv->drm,
57-
!IS_HSW_ULT(dev_priv) && !IS_BDW_ULT(dev_priv));
57+
!IS_HASWELL_ULT(dev_priv) && !IS_BDW_ULT(dev_priv));
5858
/* WPT is LPT compatible */
5959
return PCH_LPT;
6060
case INTEL_PCH_SPT_DEVICE_ID_TYPE:
@@ -186,7 +186,7 @@ intel_virt_detect_pch(const struct drm_i915_private *dev_priv,
186186
id = INTEL_PCH_CNP_DEVICE_ID_TYPE;
187187
else if (IS_KABYLAKE(dev_priv) || IS_SKYLAKE(dev_priv))
188188
id = INTEL_PCH_SPT_DEVICE_ID_TYPE;
189-
else if (IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv))
189+
else if (IS_HASWELL_ULT(dev_priv) || IS_BDW_ULT(dev_priv))
190190
id = INTEL_PCH_LPT_LP_DEVICE_ID_TYPE;
191191
else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
192192
id = INTEL_PCH_LPT_DEVICE_ID_TYPE;

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