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drm/msm/dpu: in dpu_format replace bitmap with unsigned long field
Using bitmap for the flags results in a clumsy syntax on test_bit, replace it with unsigned long type and simple binary ops. Reviewed-by: Abhinav Kumar <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/590422/ Link: https://lore.kernel.org/r/[email protected]
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+16
-18
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-18
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‎drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -45,7 +45,7 @@ bp, flg, fm, np) \
4545
.unpack_count = uc, \
4646
.bpp = bp, \
4747
.fetch_mode = fm, \
48-
.flag = {(flg)}, \
48+
.flags = flg, \
4949
.num_planes = np, \
5050
.tile_height = DPU_TILE_HEIGHT_DEFAULT \
5151
}
@@ -64,7 +64,7 @@ alpha, bp, flg, fm, np, th) \
6464
.unpack_count = uc, \
6565
.bpp = bp, \
6666
.fetch_mode = fm, \
67-
.flag = {(flg)}, \
67+
.flags = flg, \
6868
.num_planes = np, \
6969
.tile_height = th \
7070
}
@@ -84,7 +84,7 @@ alpha, chroma, count, bp, flg, fm, np) \
8484
.unpack_count = count, \
8585
.bpp = bp, \
8686
.fetch_mode = fm, \
87-
.flag = {(flg)}, \
87+
.flags = flg, \
8888
.num_planes = np, \
8989
.tile_height = DPU_TILE_HEIGHT_DEFAULT \
9090
}
@@ -102,7 +102,7 @@ alpha, chroma, count, bp, flg, fm, np) \
102102
.unpack_count = 2, \
103103
.bpp = 2, \
104104
.fetch_mode = fm, \
105-
.flag = {(flg)}, \
105+
.flags = flg, \
106106
.num_planes = np, \
107107
.tile_height = DPU_TILE_HEIGHT_DEFAULT \
108108
}
@@ -121,7 +121,7 @@ flg, fm, np, th) \
121121
.unpack_count = 2, \
122122
.bpp = 2, \
123123
.fetch_mode = fm, \
124-
.flag = {(flg)}, \
124+
.flags = flg, \
125125
.num_planes = np, \
126126
.tile_height = th \
127127
}
@@ -139,7 +139,7 @@ flg, fm, np, th) \
139139
.unpack_count = 2, \
140140
.bpp = 2, \
141141
.fetch_mode = fm, \
142-
.flag = {(flg)}, \
142+
.flags = flg, \
143143
.num_planes = np, \
144144
.tile_height = DPU_TILE_HEIGHT_DEFAULT \
145145
}
@@ -158,7 +158,7 @@ flg, fm, np, th) \
158158
.unpack_count = 2, \
159159
.bpp = 2, \
160160
.fetch_mode = fm, \
161-
.flag = {(flg)}, \
161+
.flags = flg, \
162162
.num_planes = np, \
163163
.tile_height = th \
164164
}
@@ -178,7 +178,7 @@ flg, fm, np) \
178178
.unpack_count = 1, \
179179
.bpp = bp, \
180180
.fetch_mode = fm, \
181-
.flag = {(flg)}, \
181+
.flags = flg, \
182182
.num_planes = np, \
183183
.tile_height = DPU_TILE_HEIGHT_DEFAULT \
184184
}
@@ -1047,7 +1047,7 @@ const struct dpu_format *dpu_get_dpu_format_ext(
10471047
DPU_ERROR("unsupported fmt: %4.4s modifier 0x%llX\n",
10481048
(char *)&format, modifier);
10491049
else
1050-
DRM_DEBUG_ATOMIC("fmt %4.4s mod 0x%llX ubwc %d yuv %d\n",
1050+
DRM_DEBUG_ATOMIC("fmt %4.4s mod 0x%llX ubwc %d yuv %ld\n",
10511051
(char *)&format, modifier,
10521052
DPU_FORMAT_IS_UBWC(fmt),
10531053
DPU_FORMAT_IS_YUV(fmt));

‎drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h

Lines changed: 7 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -40,23 +40,21 @@ enum dpu_format_flags {
4040
DPU_FORMAT_FLAG_YUV_BIT,
4141
DPU_FORMAT_FLAG_DX_BIT,
4242
DPU_FORMAT_FLAG_COMPRESSED_BIT,
43-
DPU_FORMAT_FLAG_BIT_MAX,
4443
};
4544

4645
#define DPU_FORMAT_FLAG_YUV BIT(DPU_FORMAT_FLAG_YUV_BIT)
4746
#define DPU_FORMAT_FLAG_DX BIT(DPU_FORMAT_FLAG_DX_BIT)
4847
#define DPU_FORMAT_FLAG_COMPRESSED BIT(DPU_FORMAT_FLAG_COMPRESSED_BIT)
49-
#define DPU_FORMAT_IS_YUV(X) \
50-
(test_bit(DPU_FORMAT_FLAG_YUV_BIT, (X)->flag))
51-
#define DPU_FORMAT_IS_DX(X) \
52-
(test_bit(DPU_FORMAT_FLAG_DX_BIT, (X)->flag))
48+
49+
#define DPU_FORMAT_IS_YUV(X) ((X)->flags & DPU_FORMAT_FLAG_YUV)
50+
#define DPU_FORMAT_IS_DX(X) ((X)->flags & DPU_FORMAT_FLAG_DX)
5351
#define DPU_FORMAT_IS_LINEAR(X) ((X)->fetch_mode == MDP_FETCH_LINEAR)
5452
#define DPU_FORMAT_IS_TILE(X) \
5553
(((X)->fetch_mode == MDP_FETCH_UBWC) && \
56-
!test_bit(DPU_FORMAT_FLAG_COMPRESSED_BIT, (X)->flag))
54+
!((X)->flags & DPU_FORMAT_FLAG_COMPRESSED))
5755
#define DPU_FORMAT_IS_UBWC(X) \
5856
(((X)->fetch_mode == MDP_FETCH_UBWC) && \
59-
test_bit(DPU_FORMAT_FLAG_COMPRESSED_BIT, (X)->flag))
57+
((X)->flags & DPU_FORMAT_FLAG_COMPRESSED))
6058

6159
#define DPU_BLEND_FG_ALPHA_FG_CONST (0 << 0)
6260
#define DPU_BLEND_FG_ALPHA_BG_CONST (1 << 0)
@@ -334,7 +332,7 @@ enum dpu_3d_blend_mode {
334332
* @alpha_enable: whether the format has an alpha channel
335333
* @num_planes: number of planes (including meta data planes)
336334
* @fetch_mode: linear, tiled, or ubwc hw fetch behavior
337-
* @flag: usage bit flags
335+
* @flags: usage bit flags
338336
* @tile_width: format tile width
339337
* @tile_height: format tile height
340338
*/
@@ -351,7 +349,7 @@ struct dpu_format {
351349
u8 alpha_enable;
352350
u8 num_planes;
353351
enum mdp_fetch_mode fetch_mode;
354-
DECLARE_BITMAP(flag, DPU_FORMAT_FLAG_BIT_MAX);
352+
unsigned long flags;
355353
u16 tile_width;
356354
u16 tile_height;
357355
};

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