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Ran Sunalexdeucher
Ran Sun
authored and
alexdeucher
committed
drm/amdgpu: Clean up errors in nv.c
Fix the following errors reported by checkpatch: ERROR: that open brace { should be on the previous line Signed-off-by: Ran Sun <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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-32
lines changed
  • drivers/gpu/drm/amd/amdgpu

1 file changed

+16
-32
lines changed

‎drivers/gpu/drm/amd/amdgpu/nv.c

Lines changed: 16 additions & 32 deletions
Original file line numberDiff line numberDiff line change
@@ -67,21 +67,18 @@
6767
static const struct amd_ip_funcs nv_common_ip_funcs;
6868

6969
/* Navi */
70-
static const struct amdgpu_video_codec_info nv_video_codecs_encode_array[] =
71-
{
70+
static const struct amdgpu_video_codec_info nv_video_codecs_encode_array[] = {
7271
{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 2304, 0)},
7372
{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 4096, 2304, 0)},
7473
};
7574

76-
static const struct amdgpu_video_codecs nv_video_codecs_encode =
77-
{
75+
static const struct amdgpu_video_codecs nv_video_codecs_encode = {
7876
.codec_count = ARRAY_SIZE(nv_video_codecs_encode_array),
7977
.codec_array = nv_video_codecs_encode_array,
8078
};
8179

8280
/* Navi1x */
83-
static const struct amdgpu_video_codec_info nv_video_codecs_decode_array[] =
84-
{
81+
static const struct amdgpu_video_codec_info nv_video_codecs_decode_array[] = {
8582
{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG2, 4096, 4096, 3)},
8683
{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4, 4096, 4096, 5)},
8784
{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 52)},
@@ -91,8 +88,7 @@ static const struct amdgpu_video_codec_info nv_video_codecs_decode_array[] =
9188
{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VP9, 8192, 4352, 0)},
9289
};
9390

94-
static const struct amdgpu_video_codecs nv_video_codecs_decode =
95-
{
91+
static const struct amdgpu_video_codecs nv_video_codecs_decode = {
9692
.codec_count = ARRAY_SIZE(nv_video_codecs_decode_array),
9793
.codec_array = nv_video_codecs_decode_array,
9894
};
@@ -108,8 +104,7 @@ static const struct amdgpu_video_codecs sc_video_codecs_encode = {
108104
.codec_array = sc_video_codecs_encode_array,
109105
};
110106

111-
static const struct amdgpu_video_codec_info sc_video_codecs_decode_array_vcn0[] =
112-
{
107+
static const struct amdgpu_video_codec_info sc_video_codecs_decode_array_vcn0[] = {
113108
{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG2, 4096, 4096, 3)},
114109
{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4, 4096, 4096, 5)},
115110
{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 52)},
@@ -120,8 +115,7 @@ static const struct amdgpu_video_codec_info sc_video_codecs_decode_array_vcn0[]
120115
{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_AV1, 8192, 4352, 0)},
121116
};
122117

123-
static const struct amdgpu_video_codec_info sc_video_codecs_decode_array_vcn1[] =
124-
{
118+
static const struct amdgpu_video_codec_info sc_video_codecs_decode_array_vcn1[] = {
125119
{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG2, 4096, 4096, 3)},
126120
{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4, 4096, 4096, 5)},
127121
{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 52)},
@@ -131,27 +125,23 @@ static const struct amdgpu_video_codec_info sc_video_codecs_decode_array_vcn1[]
131125
{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VP9, 8192, 4352, 0)},
132126
};
133127

134-
static const struct amdgpu_video_codecs sc_video_codecs_decode_vcn0 =
135-
{
128+
static const struct amdgpu_video_codecs sc_video_codecs_decode_vcn0 = {
136129
.codec_count = ARRAY_SIZE(sc_video_codecs_decode_array_vcn0),
137130
.codec_array = sc_video_codecs_decode_array_vcn0,
138131
};
139132

140-
static const struct amdgpu_video_codecs sc_video_codecs_decode_vcn1 =
141-
{
133+
static const struct amdgpu_video_codecs sc_video_codecs_decode_vcn1 = {
142134
.codec_count = ARRAY_SIZE(sc_video_codecs_decode_array_vcn1),
143135
.codec_array = sc_video_codecs_decode_array_vcn1,
144136
};
145137

146138
/* SRIOV Sienna Cichlid, not const since data is controlled by host */
147-
static struct amdgpu_video_codec_info sriov_sc_video_codecs_encode_array[] =
148-
{
139+
static struct amdgpu_video_codec_info sriov_sc_video_codecs_encode_array[] = {
149140
{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 2160, 0)},
150141
{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 7680, 4352, 0)},
151142
};
152143

153-
static struct amdgpu_video_codec_info sriov_sc_video_codecs_decode_array_vcn0[] =
154-
{
144+
static struct amdgpu_video_codec_info sriov_sc_video_codecs_decode_array_vcn0[] = {
155145
{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG2, 4096, 4096, 3)},
156146
{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4, 4096, 4096, 5)},
157147
{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 52)},
@@ -162,8 +152,7 @@ static struct amdgpu_video_codec_info sriov_sc_video_codecs_decode_array_vcn0[]
162152
{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_AV1, 8192, 4352, 0)},
163153
};
164154

165-
static struct amdgpu_video_codec_info sriov_sc_video_codecs_decode_array_vcn1[] =
166-
{
155+
static struct amdgpu_video_codec_info sriov_sc_video_codecs_decode_array_vcn1[] = {
167156
{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG2, 4096, 4096, 3)},
168157
{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4, 4096, 4096, 5)},
169158
{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 52)},
@@ -173,20 +162,17 @@ static struct amdgpu_video_codec_info sriov_sc_video_codecs_decode_array_vcn1[]
173162
{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VP9, 8192, 4352, 0)},
174163
};
175164

176-
static struct amdgpu_video_codecs sriov_sc_video_codecs_encode =
177-
{
165+
static struct amdgpu_video_codecs sriov_sc_video_codecs_encode = {
178166
.codec_count = ARRAY_SIZE(sriov_sc_video_codecs_encode_array),
179167
.codec_array = sriov_sc_video_codecs_encode_array,
180168
};
181169

182-
static struct amdgpu_video_codecs sriov_sc_video_codecs_decode_vcn0 =
183-
{
170+
static struct amdgpu_video_codecs sriov_sc_video_codecs_decode_vcn0 = {
184171
.codec_count = ARRAY_SIZE(sriov_sc_video_codecs_decode_array_vcn0),
185172
.codec_array = sriov_sc_video_codecs_decode_array_vcn0,
186173
};
187174

188-
static struct amdgpu_video_codecs sriov_sc_video_codecs_decode_vcn1 =
189-
{
175+
static struct amdgpu_video_codecs sriov_sc_video_codecs_decode_vcn1 = {
190176
.codec_count = ARRAY_SIZE(sriov_sc_video_codecs_decode_array_vcn1),
191177
.codec_array = sriov_sc_video_codecs_decode_array_vcn1,
192178
};
@@ -536,8 +522,7 @@ static void nv_program_aspm(struct amdgpu_device *adev)
536522

537523
}
538524

539-
const struct amdgpu_ip_block_version nv_common_ip_block =
540-
{
525+
const struct amdgpu_ip_block_version nv_common_ip_block = {
541526
.type = AMD_IP_BLOCK_TYPE_COMMON,
542527
.major = 1,
543528
.minor = 0,
@@ -632,8 +617,7 @@ static int nv_update_umd_stable_pstate(struct amdgpu_device *adev,
632617
return 0;
633618
}
634619

635-
static const struct amdgpu_asic_funcs nv_asic_funcs =
636-
{
620+
static const struct amdgpu_asic_funcs nv_asic_funcs = {
637621
.read_disabled_bios = &nv_read_disabled_bios,
638622
.read_bios_from_rom = &amdgpu_soc15_read_bios_from_rom,
639623
.read_register = &nv_read_register,

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