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Merge tag 'pwm/for-5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm
Pull pwm updates from Thierry Reding: "Nothing too exciting for this cycle. A couple of fixes across the board, and Lee volunteered to help with patch review" * tag 'pwm/for-5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: pwm: Add missing "CONFIG_" prefix MAINTAINERS: Add Lee Jones as reviewer for the PWM subsystem pwm: imx27: Fix rounding behavior pwm: rockchip: Simplify rockchip_pwm_get_state() pwm: img: Call pm_runtime_put() in pm_runtime_get_sync() failed case pwm: tegra: Support dynamic clock frequency configuration pwm: jz4740: Add support for the JZ4725B pwm: jz4740: Make PWM start with the active part pwm: jz4740: Enhance precision in calculation of duty cycle pwm: jz4740: Drop dependency on MACH_INGENIC pwm: lpss: Fix get_state runtime-pm reference handling pwm: sun4i: Support direct clock output on Allwinner A64 pwm: Add support for Azoteq IQS620A PWM generator dt-bindings: pwm: rcar: add r8a77961 support pwm: Add missing '\n' in log messages
2 parents 8f02f36 + f5641d0 commit 9433a51

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13 files changed

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Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.yaml

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@@ -27,6 +27,7 @@ properties:
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- renesas,pwm-r8a7794 # R-Car E2
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- renesas,pwm-r8a7795 # R-Car H3
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- renesas,pwm-r8a7796 # R-Car M3-W
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- renesas,pwm-r8a77961 # R-Car M3-W+
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- renesas,pwm-r8a77965 # R-Car M3-N
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- renesas,pwm-r8a77970 # R-Car V3M
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- renesas,pwm-r8a77980 # R-Car V3H

MAINTAINERS

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@@ -13919,6 +13919,7 @@ F: drivers/media/rc/pwm-ir-tx.c
1391913919
PWM SUBSYSTEM
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M: Thierry Reding <[email protected]>
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R: Uwe Kleine-König <[email protected]>
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M: Lee Jones <[email protected]>
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S: Maintained
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Q: https://patchwork.ozlabs.org/project/linux-pwm/list/

drivers/pwm/Kconfig

Lines changed: 11 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -232,9 +232,19 @@ config PWM_IMX_TPM
232232
To compile this driver as a module, choose M here: the module
233233
will be called pwm-imx-tpm.
234234

235+
config PWM_IQS620A
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tristate "Azoteq IQS620A PWM support"
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depends on MFD_IQS62X || COMPILE_TEST
238+
help
239+
Generic PWM framework driver for the Azoteq IQS620A multi-function
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sensor.
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To compile this driver as a module, choose M here: the module will
243+
be called pwm-iqs620a.
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config PWM_JZ4740
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tristate "Ingenic JZ47xx PWM support"
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depends on MACH_INGENIC
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depends on MIPS
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depends on COMMON_CLK
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select MFD_SYSCON
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help

drivers/pwm/Makefile

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Original file line numberDiff line numberDiff line change
@@ -20,6 +20,7 @@ obj-$(CONFIG_PWM_IMG) += pwm-img.o
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obj-$(CONFIG_PWM_IMX1) += pwm-imx1.o
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obj-$(CONFIG_PWM_IMX27) += pwm-imx27.o
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obj-$(CONFIG_PWM_IMX_TPM) += pwm-imx-tpm.o
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obj-$(CONFIG_PWM_IQS620A) += pwm-iqs620a.o
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obj-$(CONFIG_PWM_JZ4740) += pwm-jz4740.o
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obj-$(CONFIG_PWM_LP3943) += pwm-lp3943.o
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obj-$(CONFIG_PWM_LPC18XX_SCT) += pwm-lpc18xx-sct.o

drivers/pwm/core.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -121,7 +121,7 @@ static int pwm_device_request(struct pwm_device *pwm, const char *label)
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pwm->chip->ops->get_state(pwm->chip, pwm, &pwm->state);
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trace_pwm_get(pwm, &pwm->state);
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124-
if (IS_ENABLED(PWM_DEBUG))
124+
if (IS_ENABLED(CONFIG_PWM_DEBUG))
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pwm->last = pwm->state;
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}
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@@ -537,7 +537,7 @@ static void pwm_apply_state_debug(struct pwm_device *pwm,
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if (!state->enabled && s2.enabled && s2.duty_cycle > 0)
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dev_warn(chip->dev,
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"requested disabled, but yielded enabled with duty > 0");
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"requested disabled, but yielded enabled with duty > 0\n");
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/* reapply the state that the driver reported being configured. */
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err = chip->ops->apply(chip, pwm, &s1);

drivers/pwm/pwm-img.c

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -129,8 +129,10 @@ static int img_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
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duty = DIV_ROUND_UP(timebase * duty_ns, period_ns);
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131131
ret = pm_runtime_get_sync(chip->dev);
132-
if (ret < 0)
132+
if (ret < 0) {
133+
pm_runtime_put_autosuspend(chip->dev);
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return ret;
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}
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135137
val = img_pwm_readl(pwm_chip, PWM_CTRL_CFG);
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val &= ~(PWM_CTRL_CFG_DIV_MASK << PWM_CTRL_CFG_DIV_SHIFT(pwm->hwpwm));
@@ -331,8 +333,10 @@ static int img_pwm_remove(struct platform_device *pdev)
331333
int ret;
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333335
ret = pm_runtime_get_sync(&pdev->dev);
334-
if (ret < 0)
336+
if (ret < 0) {
337+
pm_runtime_put(&pdev->dev);
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return ret;
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}
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for (i = 0; i < pwm_chip->chip.npwm; i++) {
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val = img_pwm_readl(pwm_chip, PWM_CTRL_CFG);

drivers/pwm/pwm-imx27.c

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -150,13 +150,12 @@ static void pwm_imx27_get_state(struct pwm_chip *chip,
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prescaler = MX3_PWMCR_PRESCALER_GET(val);
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pwm_clk = clk_get_rate(imx->clk_per);
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pwm_clk = DIV_ROUND_CLOSEST_ULL(pwm_clk, prescaler);
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val = readl(imx->mmio_base + MX3_PWMPR);
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period = val >= MX3_PWMPR_MAX ? MX3_PWMPR_MAX : val;
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157156
/* PWMOUT (Hz) = PWMCLK / (PWMPR + 2) */
158-
tmp = NSEC_PER_SEC * (u64)(period + 2);
159-
state->period = DIV_ROUND_CLOSEST_ULL(tmp, pwm_clk);
157+
tmp = NSEC_PER_SEC * (u64)(period + 2) * prescaler;
158+
state->period = DIV_ROUND_UP_ULL(tmp, pwm_clk);
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/*
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* PWMSAR can be read only if PWM is enabled. If the PWM is disabled,
@@ -167,8 +166,8 @@ static void pwm_imx27_get_state(struct pwm_chip *chip,
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else
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val = imx->duty_cycle;
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170-
tmp = NSEC_PER_SEC * (u64)(val);
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state->duty_cycle = DIV_ROUND_CLOSEST_ULL(tmp, pwm_clk);
169+
tmp = NSEC_PER_SEC * (u64)(val) * prescaler;
170+
state->duty_cycle = DIV_ROUND_UP_ULL(tmp, pwm_clk);
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173172
pwm_imx27_clk_disable_unprepare(imx);
174173
}
@@ -220,22 +219,23 @@ static int pwm_imx27_apply(struct pwm_chip *chip, struct pwm_device *pwm,
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struct pwm_imx27_chip *imx = to_pwm_imx27_chip(chip);
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struct pwm_state cstate;
222221
unsigned long long c;
222+
unsigned long long clkrate;
223223
int ret;
224224
u32 cr;
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226226
pwm_get_state(pwm, &cstate);
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228-
c = clk_get_rate(imx->clk_per);
229-
c *= state->period;
228+
clkrate = clk_get_rate(imx->clk_per);
229+
c = clkrate * state->period;
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231-
do_div(c, 1000000000);
231+
do_div(c, NSEC_PER_SEC);
232232
period_cycles = c;
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234234
prescale = period_cycles / 0x10000 + 1;
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236236
period_cycles /= prescale;
237-
c = (unsigned long long)period_cycles * state->duty_cycle;
238-
do_div(c, state->period);
237+
c = clkrate * state->duty_cycle;
238+
do_div(c, NSEC_PER_SEC * prescale);
239239
duty_cycles = c;
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241241
/*

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