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lines changed Original file line number Diff line number Diff line change @@ -439,10 +439,12 @@ The possible values in this file are:
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- System is protected by retpoline
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* - BHI: BHI_DIS_S
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- System is protected by BHI_DIS_S
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- * - BHI: SW loop
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+ * - BHI: SW loop; KVM SW loop
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- System is protected by software clearing sequence
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* - BHI: Syscall hardening
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- Syscalls are hardened against BHI
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+ * - BHI: Syscall hardening; KVM: SW loop
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+ - System is protected from userspace attacks by syscall hardening; KVM is protected by software clearing sequence
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Full mitigation might require a microcode update from the CPU
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vendor. When the necessary microcode is not available, the kernel will
@@ -669,7 +671,8 @@ kernel command line.
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unconditionally disable.
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auto
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enable if hardware mitigation
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- control(BHI_DIS_S) is available.
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+ control(BHI_DIS_S) is available, otherwise
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+ enable alternate mitigation in KVM.
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For spectre_v2_user see Documentation/admin-guide/kernel-parameters.txt
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Original file line number Diff line number Diff line change 6071
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on - unconditionally enable.
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off - unconditionally disable.
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- auto - (default) enable only if hardware mitigation
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- control(BHI_DIS_S) is available.
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+ auto - (default) enable hardware mitigation
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+ (BHI_DIS_S) if available, otherwise enable
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+ alternate mitigation in KVM.
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spectre_v2= [X86,EARLY] Control mitigation of Spectre variant 2
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(indirect branch speculation) vulnerability.
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#define X86_FEATURE_CLEAR_BHB_LOOP (21*32+ 1) /* "" Clear branch history at syscall entry using SW loop */
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#define X86_FEATURE_BHI_CTRL (21*32+ 2) /* "" BHI_DIS_S HW control available */
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#define X86_FEATURE_CLEAR_BHB_HW (21*32+ 3) /* "" BHI_DIS_S HW control enabled */
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+ #define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* "" Clear branch history at vmexit using SW loop */
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/*
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* BUG word(s)
Original file line number Diff line number Diff line change 330
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.macro CLEAR_BRANCH_HISTORY
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ALTERNATIVE "" , "call clear_bhb_loop" , X86_FEATURE_CLEAR_BHB_LOOP
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.endm
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+
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+ .macro CLEAR_BRANCH_HISTORY_VMEXIT
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+ ALTERNATIVE "" , "call clear_bhb_loop" , X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT
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+ .endm
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#else
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#define CLEAR_BRANCH_HISTORY
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+ #define CLEAR_BRANCH_HISTORY_VMEXIT
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#endif
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#else /* __ASSEMBLY__ */
Original file line number Diff line number Diff line change @@ -1668,9 +1668,14 @@ static void __init bhi_select_mitigation(void)
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if (!IS_ENABLED (CONFIG_X86_64 ))
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return ;
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+ /* Mitigate KVM by default */
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+ setup_force_cpu_cap (X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT );
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+ pr_info ("Spectre BHI mitigation: SW BHB clearing on vm exit\n" );
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+
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if (bhi_mitigation == BHI_MITIGATION_AUTO )
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return ;
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+ /* Mitigate syscalls when the mitigation is forced =on */
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setup_force_cpu_cap (X86_FEATURE_CLEAR_BHB_LOOP );
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pr_info ("Spectre BHI mitigation: SW BHB clearing on syscall\n" );
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}
@@ -2811,10 +2816,12 @@ static const char * const spectre_bhi_state(void)
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else if (boot_cpu_has (X86_FEATURE_CLEAR_BHB_HW ))
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return "; BHI: BHI_DIS_S" ;
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else if (boot_cpu_has (X86_FEATURE_CLEAR_BHB_LOOP ))
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- return "; BHI: SW loop" ;
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+ return "; BHI: SW loop, KVM: SW loop " ;
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else if (boot_cpu_has (X86_FEATURE_RETPOLINE ) &&
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!(x86_read_arch_cap_msr () & ARCH_CAP_RRSBA ))
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return "; BHI: Retpoline" ;
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+ else if (boot_cpu_has (X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT ))
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+ return "; BHI: Syscall hardening, KVM: SW loop" ;
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return "; BHI: Vulnerable (Syscall hardening enabled)" ;
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}
Original file line number Diff line number Diff line change @@ -275,7 +275,7 @@ SYM_INNER_LABEL_ALIGN(vmx_vmexit, SYM_L_GLOBAL)
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call vmx_spec_ctrl_restore_host
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- CLEAR_BRANCH_HISTORY
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+ CLEAR_BRANCH_HISTORY_VMEXIT
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/* Put return value in AX */
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mov %_ASM_BX, %_ASM_AX
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