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ctmarinaswilldeacon
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arm64: Use macros instead of hard-coded constants for MAIR_EL1
Currently, the arm64 __cpu_setup has hard-coded constants for the memory attributes that go into the MAIR_EL1 register. Define proper macros in asm/sysreg.h and make use of them in proc.S. Signed-off-by: Catalin Marinas <[email protected]> Signed-off-by: Will Deacon <[email protected]>
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arch/arm64/include/asm/sysreg.h

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -538,6 +538,18 @@
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SCTLR_EL1_NTWE | SCTLR_ELx_IESB | SCTLR_EL1_SPAN |\
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ENDIAN_SET_EL1 | SCTLR_EL1_UCI | SCTLR_EL1_RES1)
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541+
/* MAIR_ELx memory attributes (used by Linux) */
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#define MAIR_ATTR_DEVICE_nGnRnE UL(0x00)
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#define MAIR_ATTR_DEVICE_nGnRE UL(0x04)
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#define MAIR_ATTR_DEVICE_GRE UL(0x0c)
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#define MAIR_ATTR_NORMAL_NC UL(0x44)
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#define MAIR_ATTR_NORMAL_WT UL(0xbb)
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#define MAIR_ATTR_NORMAL UL(0xff)
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#define MAIR_ATTR_MASK UL(0xff)
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/* Position the attr at the correct index */
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#define MAIR_ATTRIDX(attr, idx) ((attr) << ((idx) * 8))
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/* id_aa64isar0 */
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#define ID_AA64ISAR0_TS_SHIFT 52
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#define ID_AA64ISAR0_FHM_SHIFT 48

arch/arm64/mm/proc.S

Lines changed: 10 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -42,7 +42,14 @@
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#define TCR_KASAN_FLAGS 0
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#endif
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#define MAIR(attr, mt) ((attr) << ((mt) * 8))
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/* Default MAIR_EL1 */
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#define MAIR_EL1_SET \
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(MAIR_ATTRIDX(MAIR_ATTR_DEVICE_nGnRnE, MT_DEVICE_nGnRnE) | \
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MAIR_ATTRIDX(MAIR_ATTR_DEVICE_nGnRE, MT_DEVICE_nGnRE) | \
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MAIR_ATTRIDX(MAIR_ATTR_DEVICE_GRE, MT_DEVICE_GRE) | \
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MAIR_ATTRIDX(MAIR_ATTR_NORMAL_NC, MT_NORMAL_NC) | \
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MAIR_ATTRIDX(MAIR_ATTR_NORMAL, MT_NORMAL) | \
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MAIR_ATTRIDX(MAIR_ATTR_NORMAL_WT, MT_NORMAL_WT))
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#ifdef CONFIG_CPU_PM
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/**
@@ -416,23 +423,9 @@ ENTRY(__cpu_setup)
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enable_dbg // since this is per-cpu
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reset_pmuserenr_el0 x0 // Disable PMU access from EL0
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/*
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* Memory region attributes for LPAE:
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*
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* n = AttrIndx[2:0]
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* n MAIR
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* DEVICE_nGnRnE 000 00000000
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* DEVICE_nGnRE 001 00000100
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* DEVICE_GRE 010 00001100
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* NORMAL_NC 011 01000100
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* NORMAL 100 11111111
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* NORMAL_WT 101 10111011
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* Memory region attributes
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*/
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ldr x5, =MAIR(0x00, MT_DEVICE_nGnRnE) | \
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MAIR(0x04, MT_DEVICE_nGnRE) | \
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MAIR(0x0c, MT_DEVICE_GRE) | \
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MAIR(0x44, MT_NORMAL_NC) | \
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MAIR(0xff, MT_NORMAL) | \
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MAIR(0xbb, MT_NORMAL_WT)
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mov_q x5, MAIR_EL1_SET
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msr mair_el1, x5
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/*
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* Prepare SCTLR

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