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| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | +%YAML 1.2 |
| 3 | +--- |
| 4 | +$id: http://devicetree.org/schemas/interrupt-controller/snps,dw-apb-ictl.yaml# |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | + |
| 7 | +title: Synopsys DesignWare APB interrupt controller |
| 8 | + |
| 9 | +maintainers: |
| 10 | + - Sebastian Hesselbarth <[email protected]> |
| 11 | + |
| 12 | + |
| 13 | +description: |
| 14 | + Synopsys DesignWare provides interrupt controller IP for APB known as |
| 15 | + dw_apb_ictl. The IP is used as secondary interrupt controller in some SoCs |
| 16 | + with APB bus, e.g. Marvell Armada 1500. It can also be used as primary |
| 17 | + interrupt controller in some SoCs, e.g. Hisilicon SD5203. |
| 18 | + |
| 19 | +properties: |
| 20 | + compatible: |
| 21 | + const: snps,dw-apb-ictl |
| 22 | + |
| 23 | + reg: |
| 24 | + maxItems: 1 |
| 25 | + |
| 26 | + interrupt-controller: true |
| 27 | + |
| 28 | + '#interrupt-cells': |
| 29 | + const: 1 |
| 30 | + |
| 31 | + interrupts: |
| 32 | + maxItems: 1 |
| 33 | + description: > |
| 34 | + Interrupt input connected to the primary interrupt controller when used |
| 35 | + as a secondary controller. The interrupt specifier maps to bits in the |
| 36 | + low and high interrupt registers (0⇒bit 0 low, 1⇒bit 1 low, 32⇒bit 0 high, |
| 37 | + 33⇒bit 1 high, fast interrupts start at 64). |
| 38 | +
|
| 39 | +required: |
| 40 | + - compatible |
| 41 | + - reg |
| 42 | + - interrupt-controller |
| 43 | + - '#interrupt-cells' |
| 44 | + |
| 45 | +additionalProperties: false |
| 46 | + |
| 47 | +examples: |
| 48 | + - | |
| 49 | + #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 50 | +
|
| 51 | + interrupt-controller@3000 { |
| 52 | + compatible = "snps,dw-apb-ictl"; |
| 53 | + reg = <0x3000 0xc00>; |
| 54 | + interrupt-controller; |
| 55 | + #interrupt-cells = <1>; |
| 56 | + interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; |
| 57 | + }; |
| 58 | + - | |
| 59 | + interrupt-controller@10130000 { |
| 60 | + compatible = "snps,dw-apb-ictl"; |
| 61 | + reg = <0x10130000 0x1000>; |
| 62 | + interrupt-controller; |
| 63 | + #interrupt-cells = <1>; |
| 64 | + }; |
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