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| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| 2 | + |
| 3 | +%YAML 1.2 |
| 4 | +--- |
| 5 | +$id: "http://devicetree.org/schemas/media/qcom,sdm660-venus.yaml#" |
| 6 | +$schema: "http://devicetree.org/meta-schemas/core.yaml#" |
| 7 | + |
| 8 | +title: Qualcomm Venus video encode and decode accelerators |
| 9 | + |
| 10 | +maintainers: |
| 11 | + - Stanimir Varbanov <[email protected]> |
| 12 | + - AngeloGioacchino Del Regno <[email protected]> |
| 13 | + |
| 14 | +description: | |
| 15 | + The Venus IP is a video encode and decode accelerator present |
| 16 | + on Qualcomm platforms |
| 17 | +
|
| 18 | +properties: |
| 19 | + compatible: |
| 20 | + const: qcom,sdm660-venus |
| 21 | + |
| 22 | + reg: |
| 23 | + maxItems: 1 |
| 24 | + |
| 25 | + clocks: |
| 26 | + maxItems: 4 |
| 27 | + |
| 28 | + clock-names: |
| 29 | + items: |
| 30 | + - const: core |
| 31 | + - const: iface |
| 32 | + - const: bus |
| 33 | + - const: bus_throttle |
| 34 | + |
| 35 | + interconnects: |
| 36 | + maxItems: 2 |
| 37 | + |
| 38 | + interconnect-names: |
| 39 | + items: |
| 40 | + - const: cpu-cfg |
| 41 | + - const: video-mem |
| 42 | + |
| 43 | + interrupts: |
| 44 | + maxItems: 1 |
| 45 | + |
| 46 | + iommus: |
| 47 | + maxItems: 20 |
| 48 | + |
| 49 | + memory-region: |
| 50 | + maxItems: 1 |
| 51 | + |
| 52 | + power-domains: |
| 53 | + maxItems: 1 |
| 54 | + |
| 55 | + video-decoder: |
| 56 | + type: object |
| 57 | + |
| 58 | + properties: |
| 59 | + compatible: |
| 60 | + const: venus-decoder |
| 61 | + |
| 62 | + clocks: |
| 63 | + maxItems: 1 |
| 64 | + |
| 65 | + clock-names: |
| 66 | + items: |
| 67 | + - const: vcodec0_core |
| 68 | + |
| 69 | + power-domains: |
| 70 | + maxItems: 1 |
| 71 | + |
| 72 | + required: |
| 73 | + - compatible |
| 74 | + - clocks |
| 75 | + - clock-names |
| 76 | + - power-domains |
| 77 | + |
| 78 | + additionalProperties: false |
| 79 | + |
| 80 | + video-encoder: |
| 81 | + type: object |
| 82 | + |
| 83 | + properties: |
| 84 | + compatible: |
| 85 | + const: venus-encoder |
| 86 | + |
| 87 | + clocks: |
| 88 | + maxItems: 1 |
| 89 | + |
| 90 | + clock-names: |
| 91 | + items: |
| 92 | + - const: vcodec0_core |
| 93 | + |
| 94 | + power-domains: |
| 95 | + maxItems: 1 |
| 96 | + |
| 97 | + required: |
| 98 | + - compatible |
| 99 | + - clocks |
| 100 | + - clock-names |
| 101 | + - power-domains |
| 102 | + |
| 103 | + additionalProperties: false |
| 104 | + |
| 105 | + video-firmware: |
| 106 | + type: object |
| 107 | + |
| 108 | + description: | |
| 109 | + Firmware subnode is needed when the platform does not |
| 110 | + have TrustZone. |
| 111 | +
|
| 112 | + properties: |
| 113 | + iommus: |
| 114 | + maxItems: 1 |
| 115 | + |
| 116 | + required: |
| 117 | + - iommus |
| 118 | + |
| 119 | +required: |
| 120 | + - compatible |
| 121 | + - reg |
| 122 | + - clocks |
| 123 | + - clock-names |
| 124 | + - interrupts |
| 125 | + - iommus |
| 126 | + - memory-region |
| 127 | + - power-domains |
| 128 | + - video-decoder |
| 129 | + - video-encoder |
| 130 | + |
| 131 | +additionalProperties: false |
| 132 | + |
| 133 | +examples: |
| 134 | + - | |
| 135 | + #include <dt-bindings/clock/qcom,mmcc-sdm660.h> |
| 136 | + #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 137 | +
|
| 138 | + video-codec@cc00000 { |
| 139 | + compatible = "qcom,sdm660-venus"; |
| 140 | + reg = <0x0cc00000 0xff000>; |
| 141 | + clocks = <&mmcc VIDEO_CORE_CLK>, |
| 142 | + <&mmcc VIDEO_AHB_CLK>, |
| 143 | + <&mmcc VIDEO_AXI_CLK>, |
| 144 | + <&mmcc THROTTLE_VIDEO_AXI_CLK>; |
| 145 | + clock-names = "core", "iface", "bus", "bus_throttle"; |
| 146 | + interconnects = <&gnoc 0 &mnoc 13>, |
| 147 | + <&mnoc 4 &bimc 5>; |
| 148 | + interconnect-names = "cpu-cfg", "video-mem"; |
| 149 | + interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; |
| 150 | + iommus = <&mmss_smmu 0x400>, |
| 151 | + <&mmss_smmu 0x401>, |
| 152 | + <&mmss_smmu 0x40a>, |
| 153 | + <&mmss_smmu 0x407>, |
| 154 | + <&mmss_smmu 0x40e>, |
| 155 | + <&mmss_smmu 0x40f>, |
| 156 | + <&mmss_smmu 0x408>, |
| 157 | + <&mmss_smmu 0x409>, |
| 158 | + <&mmss_smmu 0x40b>, |
| 159 | + <&mmss_smmu 0x40c>, |
| 160 | + <&mmss_smmu 0x40d>, |
| 161 | + <&mmss_smmu 0x410>, |
| 162 | + <&mmss_smmu 0x421>, |
| 163 | + <&mmss_smmu 0x428>, |
| 164 | + <&mmss_smmu 0x429>, |
| 165 | + <&mmss_smmu 0x42b>, |
| 166 | + <&mmss_smmu 0x42c>, |
| 167 | + <&mmss_smmu 0x42d>, |
| 168 | + <&mmss_smmu 0x411>, |
| 169 | + <&mmss_smmu 0x431>; |
| 170 | + memory-region = <&venus_region>; |
| 171 | + power-domains = <&mmcc VENUS_GDSC>; |
| 172 | +
|
| 173 | + video-decoder { |
| 174 | + compatible = "venus-decoder"; |
| 175 | + clocks = <&mmcc VIDEO_SUBCORE0_CLK>; |
| 176 | + clock-names = "vcodec0_core"; |
| 177 | + power-domains = <&mmcc VENUS_CORE0_GDSC>; |
| 178 | + }; |
| 179 | +
|
| 180 | + video-encoder { |
| 181 | + compatible = "venus-encoder"; |
| 182 | + clocks = <&mmcc VIDEO_SUBCORE0_CLK>; |
| 183 | + clock-names = "vcodec0_core"; |
| 184 | + power-domains = <&mmcc VENUS_CORE0_GDSC>; |
| 185 | + }; |
| 186 | + }; |
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