Skip to content

Commit 97f7d41

Browse files
linuswlinusw
committed
Merge tag 'sh-pfc-for-v5.6-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel
pinctrl: sh-pfc: Updates for v5.5 - Split R-Car H3 support in two independent drivers, - Miscellaneous fixes and cleanups.
2 parents 9a4c227 + f2bc075 commit 97f7d41

File tree

14 files changed

+146
-116
lines changed

14 files changed

+146
-116
lines changed

‎arch/sh/include/cpu-sh2a/cpu/sh7264.h

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -112,12 +112,6 @@ enum {
112112
GPIO_FN_TIOC0D, GPIO_FN_TIOC0C, GPIO_FN_TIOC0B, GPIO_FN_TIOC0A,
113113
GPIO_FN_TCLKD, GPIO_FN_TCLKC, GPIO_FN_TCLKB, GPIO_FN_TCLKA,
114114

115-
/* SSU */
116-
GPIO_FN_SCS0_PD, GPIO_FN_SSO0_PD, GPIO_FN_SSI0_PD, GPIO_FN_SSCK0_PD,
117-
GPIO_FN_SCS0_PF, GPIO_FN_SSO0_PF, GPIO_FN_SSI0_PF, GPIO_FN_SSCK0_PF,
118-
GPIO_FN_SCS1_PD, GPIO_FN_SSO1_PD, GPIO_FN_SSI1_PD, GPIO_FN_SSCK1_PD,
119-
GPIO_FN_SCS1_PF, GPIO_FN_SSO1_PF, GPIO_FN_SSI1_PF, GPIO_FN_SSCK1_PF,
120-
121115
/* SCIF */
122116
GPIO_FN_SCK0, GPIO_FN_SCK1, GPIO_FN_SCK2, GPIO_FN_SCK3,
123117
GPIO_FN_RXD0, GPIO_FN_RXD1, GPIO_FN_RXD2, GPIO_FN_RXD3,

‎arch/sh/include/cpu-sh2a/cpu/sh7269.h

Lines changed: 9 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -78,8 +78,15 @@ enum {
7878
GPIO_FN_WDTOVF,
7979

8080
/* CAN */
81-
GPIO_FN_CTX1, GPIO_FN_CRX1, GPIO_FN_CTX0, GPIO_FN_CTX0_CTX1,
82-
GPIO_FN_CRX0, GPIO_FN_CRX0_CRX1, GPIO_FN_CRX0_CRX1_CRX2,
81+
GPIO_FN_CTX2, GPIO_FN_CRX2,
82+
GPIO_FN_CTX1, GPIO_FN_CRX1,
83+
GPIO_FN_CTX0, GPIO_FN_CRX0,
84+
GPIO_FN_CTX0_CTX1, GPIO_FN_CRX0_CRX1,
85+
GPIO_FN_CTX0_CTX1_CTX2, GPIO_FN_CRX0_CRX1_CRX2,
86+
GPIO_FN_CTX2_PJ21, GPIO_FN_CRX2_PJ20,
87+
GPIO_FN_CTX1_PJ23, GPIO_FN_CRX1_PJ22,
88+
GPIO_FN_CTX0_CTX1_PJ23, GPIO_FN_CRX0_CRX1_PJ22,
89+
GPIO_FN_CTX0_CTX1_CTX2_PJ21, GPIO_FN_CRX0_CRX1_CRX2_PJ20,
8390

8491
/* DMAC */
8592
GPIO_FN_TEND0, GPIO_FN_DACK0, GPIO_FN_DREQ0,
@@ -119,12 +126,6 @@ enum {
119126
GPIO_FN_TIOC0D, GPIO_FN_TIOC0C, GPIO_FN_TIOC0B, GPIO_FN_TIOC0A,
120127
GPIO_FN_TCLKD, GPIO_FN_TCLKC, GPIO_FN_TCLKB, GPIO_FN_TCLKA,
121128

122-
/* SSU */
123-
GPIO_FN_SCS0_PD, GPIO_FN_SSO0_PD, GPIO_FN_SSI0_PD, GPIO_FN_SSCK0_PD,
124-
GPIO_FN_SCS0_PF, GPIO_FN_SSO0_PF, GPIO_FN_SSI0_PF, GPIO_FN_SSCK0_PF,
125-
GPIO_FN_SCS1_PD, GPIO_FN_SSO1_PD, GPIO_FN_SSI1_PD, GPIO_FN_SSCK1_PD,
126-
GPIO_FN_SCS1_PF, GPIO_FN_SSO1_PF, GPIO_FN_SSI1_PF, GPIO_FN_SSCK1_PF,
127-
128129
/* SCIF */
129130
GPIO_FN_SCK0, GPIO_FN_RXD0, GPIO_FN_TXD0,
130131
GPIO_FN_SCK1, GPIO_FN_RXD1, GPIO_FN_TXD1, GPIO_FN_RTS1, GPIO_FN_CTS1,

‎drivers/pinctrl/pinctrl-rza1.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1229,8 +1229,8 @@ static int rza1_parse_gpiochip(struct rza1_pinctrl *rza1_pctl,
12291229

12301230
pinctrl_add_gpio_range(rza1_pctl->pctl, range);
12311231

1232-
dev_info(rza1_pctl->dev, "Parsed gpiochip %s with %d pins\n",
1233-
chip->label, chip->ngpio);
1232+
dev_dbg(rza1_pctl->dev, "Parsed gpiochip %s with %d pins\n",
1233+
chip->label, chip->ngpio);
12341234

12351235
return 0;
12361236
}

‎drivers/pinctrl/sh-pfc/Kconfig

Lines changed: 8 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -26,8 +26,9 @@ config PINCTRL_SH_PFC
2626
select PINCTRL_PFC_R8A7792 if ARCH_R8A7792
2727
select PINCTRL_PFC_R8A7793 if ARCH_R8A7793
2828
select PINCTRL_PFC_R8A7794 if ARCH_R8A7794
29-
select PINCTRL_PFC_R8A7795 if ARCH_R8A7795
30-
select PINCTRL_PFC_R8A77960 if ARCH_R8A77960 || ARCH_R8A7796
29+
select PINCTRL_PFC_R8A77950 if ARCH_R8A77950 || ARCH_R8A7795
30+
select PINCTRL_PFC_R8A77951 if ARCH_R8A77951 || ARCH_R8A7795
31+
select PINCTRL_PFC_R8A77960 if ARCH_R8A77960
3132
select PINCTRL_PFC_R8A77961 if ARCH_R8A77961
3233
select PINCTRL_PFC_R8A77965 if ARCH_R8A77965
3334
select PINCTRL_PFC_R8A77970 if ARCH_R8A77970
@@ -115,8 +116,11 @@ config PINCTRL_PFC_R8A7793
115116
config PINCTRL_PFC_R8A7794
116117
bool "R-Car E2 pin control support" if COMPILE_TEST
117118

118-
config PINCTRL_PFC_R8A7795
119-
bool "R-Car H3 pin control support" if COMPILE_TEST
119+
config PINCTRL_PFC_R8A77950
120+
bool "R-Car H3 ES1.x pin control support" if COMPILE_TEST
121+
122+
config PINCTRL_PFC_R8A77951
123+
bool "R-Car H3 ES2.0+ pin control support" if COMPILE_TEST
120124

121125
config PINCTRL_PFC_R8A77960
122126
bool "R-Car M3-W pin control support" if COMPILE_TEST

‎drivers/pinctrl/sh-pfc/Makefile

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -18,8 +18,8 @@ obj-$(CONFIG_PINCTRL_PFC_R8A7791) += pfc-r8a7791.o
1818
obj-$(CONFIG_PINCTRL_PFC_R8A7792) += pfc-r8a7792.o
1919
obj-$(CONFIG_PINCTRL_PFC_R8A7793) += pfc-r8a7791.o
2020
obj-$(CONFIG_PINCTRL_PFC_R8A7794) += pfc-r8a7794.o
21-
obj-$(CONFIG_PINCTRL_PFC_R8A7795) += pfc-r8a7795.o
22-
obj-$(CONFIG_PINCTRL_PFC_R8A7795) += pfc-r8a7795-es1.o
21+
obj-$(CONFIG_PINCTRL_PFC_R8A77950) += pfc-r8a77950.o
22+
obj-$(CONFIG_PINCTRL_PFC_R8A77951) += pfc-r8a77951.o
2323
obj-$(CONFIG_PINCTRL_PFC_R8A77960) += pfc-r8a7796.o
2424
obj-$(CONFIG_PINCTRL_PFC_R8A77961) += pfc-r8a7796.o
2525
obj-$(CONFIG_PINCTRL_PFC_R8A77965) += pfc-r8a77965.o

‎drivers/pinctrl/sh-pfc/core.c

Lines changed: 44 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -23,6 +23,7 @@
2323
#include <linux/platform_device.h>
2424
#include <linux/psci.h>
2525
#include <linux/slab.h>
26+
#include <linux/sys_soc.h>
2627

2728
#include "core.h"
2829

@@ -568,18 +569,18 @@ static const struct of_device_id sh_pfc_of_table[] = {
568569
.data = &r8a7794_pinmux_info,
569570
},
570571
#endif
571-
#ifdef CONFIG_PINCTRL_PFC_R8A7795
572+
/* Both r8a7795 entries must be present to make sanity checks work */
573+
#ifdef CONFIG_PINCTRL_PFC_R8A77950
572574
{
573575
.compatible = "renesas,pfc-r8a7795",
574-
.data = &r8a7795_pinmux_info,
576+
.data = &r8a77950_pinmux_info,
575577
},
576-
#ifdef DEBUG
578+
#endif
579+
#ifdef CONFIG_PINCTRL_PFC_R8A77951
577580
{
578-
/* For sanity checks only (nothing matches against this) */
579-
.compatible = "renesas,pfc-r8a77950", /* R-Car H3 ES1.0 */
580-
.data = &r8a7795es1_pinmux_info,
581+
.compatible = "renesas,pfc-r8a7795",
582+
.data = &r8a77951_pinmux_info,
581583
},
582-
#endif /* DEBUG */
583584
#endif
584585
#ifdef CONFIG_PINCTRL_PFC_R8A77960
585586
{
@@ -886,19 +887,49 @@ static void __init sh_pfc_check_driver(const struct platform_driver *pdrv)
886887
static inline void sh_pfc_check_driver(struct platform_driver *pdrv) {}
887888
#endif /* !DEBUG */
888889

890+
#ifdef CONFIG_OF
891+
static const void *sh_pfc_quirk_match(void)
892+
{
893+
#if defined(CONFIG_PINCTRL_PFC_R8A77950) || \
894+
defined(CONFIG_PINCTRL_PFC_R8A77951)
895+
const struct soc_device_attribute *match;
896+
static const struct soc_device_attribute quirks[] = {
897+
{
898+
.soc_id = "r8a7795", .revision = "ES1.*",
899+
.data = &r8a77950_pinmux_info,
900+
},
901+
{
902+
.soc_id = "r8a7795",
903+
.data = &r8a77951_pinmux_info,
904+
},
905+
906+
{ /* sentinel */ }
907+
};
908+
909+
match = soc_device_match(quirks);
910+
if (match)
911+
return match->data ?: ERR_PTR(-ENODEV);
912+
#endif /* CONFIG_PINCTRL_PFC_R8A77950 || CONFIG_PINCTRL_PFC_R8A77951 */
913+
914+
return NULL;
915+
}
916+
#endif /* CONFIG_OF */
917+
889918
static int sh_pfc_probe(struct platform_device *pdev)
890919
{
891-
#ifdef CONFIG_OF
892-
struct device_node *np = pdev->dev.of_node;
893-
#endif
894920
const struct sh_pfc_soc_info *info;
895921
struct sh_pfc *pfc;
896922
int ret;
897923

898924
#ifdef CONFIG_OF
899-
if (np)
900-
info = of_device_get_match_data(&pdev->dev);
901-
else
925+
if (pdev->dev.of_node) {
926+
info = sh_pfc_quirk_match();
927+
if (IS_ERR(info))
928+
return PTR_ERR(info);
929+
930+
if (!info)
931+
info = of_device_get_match_data(&pdev->dev);
932+
} else
902933
#endif
903934
info = (const void *)platform_get_device_id(pdev)->driver_data;
904935

‎drivers/pinctrl/sh-pfc/gpio.c

Lines changed: 5 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -386,12 +386,11 @@ int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
386386
}
387387

388388
/* Register the function GPIOs chip. */
389-
if (pfc->info->nr_func_gpios == 0)
390-
return 0;
391-
392-
chip = sh_pfc_add_gpiochip(pfc, gpio_function_setup, NULL);
393-
if (IS_ERR(chip))
394-
return PTR_ERR(chip);
389+
if (pfc->info->nr_func_gpios) {
390+
chip = sh_pfc_add_gpiochip(pfc, gpio_function_setup, NULL);
391+
if (IS_ERR(chip))
392+
return PTR_ERR(chip);
393+
}
395394
#endif /* CONFIG_PINCTRL_SH_FUNC_GPIO */
396395

397396
return 0;

‎drivers/pinctrl/sh-pfc/pfc-r8a7778.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2305,7 +2305,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
23052305
FN_ATAG0_A, 0, FN_REMOCON_B, 0,
23062306
/* IP0_11_8 [4] */
23072307
FN_SD1_DAT2_A, FN_MMC_D2, 0, FN_BS,
2308-
FN_ATADIR0_A, 0, FN_SDSELF_B, 0,
2308+
FN_ATADIR0_A, 0, FN_SDSELF_A, 0,
23092309
FN_PWM4_B, 0, 0, 0,
23102310
0, 0, 0, 0,
23112311
/* IP0_7_5 [3] */
@@ -2349,7 +2349,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
23492349
FN_TS_SDAT0_A, 0, 0, 0,
23502350
0, 0, 0, 0,
23512351
/* IP1_10_8 [3] */
2352-
FN_SD1_CLK_B, FN_MMC_D6, 0, FN_A24,
2352+
FN_SD1_CD_A, FN_MMC_D6, 0, FN_A24,
23532353
FN_DREQ1_A, 0, FN_HRX0_B, FN_TS_SPSYNC0_A,
23542354
/* IP1_7_5 [3] */
23552355
FN_A23, FN_HTX0_B, FN_TX2_B, FN_DACK2_A,

‎drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c renamed to ‎drivers/pinctrl/sh-pfc/pfc-r8a77950.c

Lines changed: 13 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
// SPDX-License-Identifier: GPL-2.0
22
/*
3-
* R8A7795 ES1.x processor support - PFC hardware block.
3+
* R8A77950 processor support - PFC hardware block.
44
*
55
* Copyright (C) 2015-2017 Renesas Electronics Corporation
66
*/
@@ -5562,8 +5562,8 @@ static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
55625562
{ /* sentinel */ },
55635563
};
55645564

5565-
static int r8a7795es1_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin,
5566-
u32 *pocctrl)
5565+
static int r8a77950_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin,
5566+
u32 *pocctrl)
55675567
{
55685568
int bit = -EINVAL;
55695569

@@ -5820,8 +5820,8 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = {
58205820
{ /* sentinel */ },
58215821
};
58225822

5823-
static unsigned int r8a7795es1_pinmux_get_bias(struct sh_pfc *pfc,
5824-
unsigned int pin)
5823+
static unsigned int r8a77950_pinmux_get_bias(struct sh_pfc *pfc,
5824+
unsigned int pin)
58255825
{
58265826
const struct pinmux_bias_reg *reg;
58275827
unsigned int bit;
@@ -5838,8 +5838,8 @@ static unsigned int r8a7795es1_pinmux_get_bias(struct sh_pfc *pfc,
58385838
return PIN_CONFIG_BIAS_PULL_DOWN;
58395839
}
58405840

5841-
static void r8a7795es1_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
5842-
unsigned int bias)
5841+
static void r8a77950_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
5842+
unsigned int bias)
58435843
{
58445844
const struct pinmux_bias_reg *reg;
58455845
u32 enable, updown;
@@ -5861,15 +5861,15 @@ static void r8a7795es1_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
58615861
sh_pfc_write(pfc, reg->puen, enable);
58625862
}
58635863

5864-
static const struct sh_pfc_soc_operations r8a7795es1_pinmux_ops = {
5865-
.pin_to_pocctrl = r8a7795es1_pin_to_pocctrl,
5866-
.get_bias = r8a7795es1_pinmux_get_bias,
5867-
.set_bias = r8a7795es1_pinmux_set_bias,
5864+
static const struct sh_pfc_soc_operations r8a77950_pinmux_ops = {
5865+
.pin_to_pocctrl = r8a77950_pin_to_pocctrl,
5866+
.get_bias = r8a77950_pinmux_get_bias,
5867+
.set_bias = r8a77950_pinmux_set_bias,
58685868
};
58695869

5870-
const struct sh_pfc_soc_info r8a7795es1_pinmux_info = {
5870+
const struct sh_pfc_soc_info r8a77950_pinmux_info = {
58715871
.name = "r8a77950_pfc",
5872-
.ops = &r8a7795es1_pinmux_ops,
5872+
.ops = &r8a77950_pinmux_ops,
58735873
.unlock_reg = 0xe6060000, /* PMMR */
58745874

58755875
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },

‎drivers/pinctrl/sh-pfc/pfc-r8a7795.c renamed to ‎drivers/pinctrl/sh-pfc/pfc-r8a77951.c

Lines changed: 13 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
// SPDX-License-Identifier: GPL-2.0
22
/*
3-
* R8A7795 ES2.0+ processor support - PFC hardware block.
3+
* R8A77951 processor support - PFC hardware block.
44
*
55
* Copyright (C) 2015-2019 Renesas Electronics Corporation
66
*/
@@ -5915,7 +5915,8 @@ static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
59155915
{ /* sentinel */ },
59165916
};
59175917

5918-
static int r8a7795_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, u32 *pocctrl)
5918+
static int r8a77951_pin_to_pocctrl(struct sh_pfc *pfc,
5919+
unsigned int pin, u32 *pocctrl)
59195920
{
59205921
int bit = -EINVAL;
59215922

@@ -6172,8 +6173,8 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = {
61726173
{ /* sentinel */ },
61736174
};
61746175

6175-
static unsigned int r8a7795_pinmux_get_bias(struct sh_pfc *pfc,
6176-
unsigned int pin)
6176+
static unsigned int r8a77951_pinmux_get_bias(struct sh_pfc *pfc,
6177+
unsigned int pin)
61776178
{
61786179
const struct pinmux_bias_reg *reg;
61796180
unsigned int bit;
@@ -6190,8 +6191,8 @@ static unsigned int r8a7795_pinmux_get_bias(struct sh_pfc *pfc,
61906191
return PIN_CONFIG_BIAS_PULL_DOWN;
61916192
}
61926193

6193-
static void r8a7795_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
6194-
unsigned int bias)
6194+
static void r8a77951_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
6195+
unsigned int bias)
61956196
{
61966197
const struct pinmux_bias_reg *reg;
61976198
u32 enable, updown;
@@ -6213,29 +6214,15 @@ static void r8a7795_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
62136214
sh_pfc_write(pfc, reg->puen, enable);
62146215
}
62156216

6216-
static const struct soc_device_attribute r8a7795es1[] = {
6217-
{ .soc_id = "r8a7795", .revision = "ES1.*" },
6218-
{ /* sentinel */ }
6217+
static const struct sh_pfc_soc_operations r8a77951_pinmux_ops = {
6218+
.pin_to_pocctrl = r8a77951_pin_to_pocctrl,
6219+
.get_bias = r8a77951_pinmux_get_bias,
6220+
.set_bias = r8a77951_pinmux_set_bias,
62196221
};
62206222

6221-
static int r8a7795_pinmux_init(struct sh_pfc *pfc)
6222-
{
6223-
if (soc_device_match(r8a7795es1))
6224-
pfc->info = &r8a7795es1_pinmux_info;
6225-
6226-
return 0;
6227-
}
6228-
6229-
static const struct sh_pfc_soc_operations r8a7795_pinmux_ops = {
6230-
.init = r8a7795_pinmux_init,
6231-
.pin_to_pocctrl = r8a7795_pin_to_pocctrl,
6232-
.get_bias = r8a7795_pinmux_get_bias,
6233-
.set_bias = r8a7795_pinmux_set_bias,
6234-
};
6235-
6236-
const struct sh_pfc_soc_info r8a7795_pinmux_info = {
6223+
const struct sh_pfc_soc_info r8a77951_pinmux_info = {
62376224
.name = "r8a77951_pfc",
6238-
.ops = &r8a7795_pinmux_ops,
6225+
.ops = &r8a77951_pinmux_ops,
62396226
.unlock_reg = 0xe6060000, /* PMMR */
62406227

62416228
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },

0 commit comments

Comments
 (0)