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dt-bindings: arm-smmu: fix clocks/clock-names schema
Rework clocks/clock-names properties schema to properly describe possible usage cases. Reviewed-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
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Documentation/devicetree/bindings/iommu/arm,smmu.yaml

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@@ -161,16 +161,12 @@ properties:
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present in such cases.
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clock-names:
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items:
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- const: bus
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- const: iface
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minItems: 1
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maxItems: 7
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clocks:
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items:
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- description: bus clock required for downstream bus access and for the
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smmu ptw
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- description: interface clock required to access smmu's registers
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through the TCU's programming interface.
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minItems: 1
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maxItems: 7
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power-domains:
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maxItems: 1
@@ -220,6 +216,123 @@ allOf:
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reg:
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maxItems: 1
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,msm8998-smmu-v2
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- qcom,sdm630-smmu-v2
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then:
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anyOf:
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- properties:
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clock-names:
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items:
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- const: bus
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clocks:
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items:
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- description: bus clock required for downstream bus access and for
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the smmu ptw
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- properties:
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clock-names:
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items:
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- const: iface
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- const: mem
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- const: mem_iface
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clocks:
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items:
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- description: interface clock required to access smmu's registers
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through the TCU's programming interface.
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- description: bus clock required for memory access
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- description: bus clock required for GPU memory access
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- properties:
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clock-names:
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items:
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- const: iface-mm
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- const: iface-smmu
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- const: bus-mm
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- const: bus-smmu
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clocks:
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items:
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- description: interface clock required to access mnoc's registers
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through the TCU's programming interface.
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- description: interface clock required to access smmu's registers
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through the TCU's programming interface.
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- description: bus clock required for downstream bus access
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- description: bus clock required for the smmu ptw
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,msm8996-smmu-v2
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- qcom,sc7180-smmu-v2
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- qcom,sdm845-smmu-v2
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then:
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properties:
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clock-names:
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items:
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- const: bus
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- const: iface
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clocks:
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items:
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- description: bus clock required for downstream bus access and for
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the smmu ptw
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- description: interface clock required to access smmu's registers
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through the TCU's programming interface.
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- if:
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properties:
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compatible:
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contains:
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const: qcom,sc7280-smmu-500
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then:
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properties:
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clock-names:
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items:
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- const: gcc_gpu_memnoc_gfx_clk
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- const: gcc_gpu_snoc_dvm_gfx_clk
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- const: gpu_cc_ahb_clk
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- const: gpu_cc_hlos1_vote_gpu_smmu_clk
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- const: gpu_cc_cx_gmu_clk
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- const: gpu_cc_hub_cx_int_clk
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- const: gpu_cc_hub_aon_clk
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clocks:
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items:
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- description: GPU memnoc_gfx clock
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- description: GPU snoc_dvm_gfx clock
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- description: GPU ahb clock
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- description: GPU hlos1_vote_GPU smmu clock
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- description: GPU cx_gmu clock
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- description: GPU hub_cx_int clock
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- description: GPU hub_aon clock
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,sm8150-smmu-500
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- qcom,sm8250-smmu-500
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then:
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properties:
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clock-names:
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items:
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- const: ahb
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- const: bus
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- const: iface
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clocks:
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items:
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- description: bus clock required for AHB bus access
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- description: bus clock required for downstream bus access and for
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the smmu ptw
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- description: interface clock required to access smmu's registers
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through the TCU's programming interface.
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examples:
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- |+
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/* SMMU with stream matching or stream indexing */

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