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Documentation: RISC-V: uabi: Only scalar misaligned loads are supported
We're stuck supporting scalar misaligned loads in userspace because they were part of the ISA at the time we froze the uABI. That wasn't the case for vector misaligned accesses, so depending on them unconditionally is a userspace bug. All extant vector hardware traps on these misaligned accesses. Reviewed-by: Conor Dooley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Palmer Dabbelt <[email protected]>
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Documentation/arch/riscv/uabi.rst

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@@ -65,4 +65,6 @@ the extension, or may have deliberately removed it from the listing.
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Misaligned accesses
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Misaligned accesses are supported in userspace, but they may perform poorly.
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Misaligned scalar accesses are supported in userspace, but they may perform
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poorly. Misaligned vector accesses are only supported if the Zicclsm extension
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is supported.

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