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Kathiravan Thirumoorthyandersson
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clk: qcom: ipq9574: drop the CLK_SET_RATE_PARENT flag from GPLL clocks
GPLL clock rates are fixed and shouldn't be scaled based on the request from dependent clocks. Doing so will result in the unexpected behaviour. So drop the CLK_SET_RATE_PARENT flag from the GPLL clocks. ---- Changes in V2: - No changes Fixes: d75b82c ("clk: qcom: Add Global Clock Controller driver for IPQ9574") Signed-off-by: Kathiravan Thirumoorthy <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
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drivers/clk/qcom/gcc-ipq9574.c

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@@ -87,7 +87,6 @@ static struct clk_fixed_factor gpll0_out_main_div2 = {
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&gpll0_main.clkr.hw
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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.ops = &clk_fixed_factor_ops,
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},
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};
@@ -102,7 +101,6 @@ static struct clk_alpha_pll_postdiv gpll0 = {
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&gpll0_main.clkr.hw
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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.ops = &clk_alpha_pll_postdiv_ro_ops,
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},
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};
@@ -132,7 +130,6 @@ static struct clk_alpha_pll_postdiv gpll4 = {
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&gpll4_main.clkr.hw
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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.ops = &clk_alpha_pll_postdiv_ro_ops,
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},
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};
@@ -162,7 +159,6 @@ static struct clk_alpha_pll_postdiv gpll2 = {
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&gpll2_main.clkr.hw
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},
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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.ops = &clk_alpha_pll_postdiv_ro_ops,
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},
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};

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