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airliedairlied
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Merge tag 'amd-drm-fixes-5.6-2020-02-19' of git://people.freedesktop.org/~agd5f/linux into drm-fixes
amd-drm-fixes-5.6-2020-02-19: amdgpu: - HDCP fixes - xclk fix for raven - GFXOFF fixes Signed-off-by: Dave Airlie <[email protected]> From: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2 parents 11a48a5 + 6c62ce8 commit 99edb18

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7 files changed

+55
-13
lines changed

7 files changed

+55
-13
lines changed

‎drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

Lines changed: 25 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1013,6 +1013,30 @@ static int psp_dtm_initialize(struct psp_context *psp)
10131013
return 0;
10141014
}
10151015

1016+
static int psp_dtm_unload(struct psp_context *psp)
1017+
{
1018+
int ret;
1019+
struct psp_gfx_cmd_resp *cmd;
1020+
1021+
/*
1022+
* TODO: bypass the unloading in sriov for now
1023+
*/
1024+
if (amdgpu_sriov_vf(psp->adev))
1025+
return 0;
1026+
1027+
cmd = kzalloc(sizeof(struct psp_gfx_cmd_resp), GFP_KERNEL);
1028+
if (!cmd)
1029+
return -ENOMEM;
1030+
1031+
psp_prep_ta_unload_cmd_buf(cmd, psp->dtm_context.session_id);
1032+
1033+
ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr);
1034+
1035+
kfree(cmd);
1036+
1037+
return ret;
1038+
}
1039+
10161040
int psp_dtm_invoke(struct psp_context *psp, uint32_t ta_cmd_id)
10171041
{
10181042
/*
@@ -1037,7 +1061,7 @@ static int psp_dtm_terminate(struct psp_context *psp)
10371061
if (!psp->dtm_context.dtm_initialized)
10381062
return 0;
10391063

1040-
ret = psp_hdcp_unload(psp);
1064+
ret = psp_dtm_unload(psp);
10411065
if (ret)
10421066
return ret;
10431067

‎drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3923,11 +3923,13 @@ static uint64_t gfx_v10_0_get_gpu_clock_counter(struct amdgpu_device *adev)
39233923
{
39243924
uint64_t clock;
39253925

3926+
amdgpu_gfx_off_ctrl(adev, false);
39263927
mutex_lock(&adev->gfx.gpu_clock_mutex);
39273928
WREG32_SOC15(GC, 0, mmRLC_CAPTURE_GPU_CLOCK_COUNT, 1);
39283929
clock = (uint64_t)RREG32_SOC15(GC, 0, mmRLC_GPU_CLOCK_COUNT_LSB) |
39293930
((uint64_t)RREG32_SOC15(GC, 0, mmRLC_GPU_CLOCK_COUNT_MSB) << 32ULL);
39303931
mutex_unlock(&adev->gfx.gpu_clock_mutex);
3932+
amdgpu_gfx_off_ctrl(adev, true);
39313933
return clock;
39323934
}
39333935

‎drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

Lines changed: 11 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1193,6 +1193,14 @@ static bool gfx_v9_0_should_disable_gfxoff(struct pci_dev *pdev)
11931193
return false;
11941194
}
11951195

1196+
static bool is_raven_kicker(struct amdgpu_device *adev)
1197+
{
1198+
if (adev->pm.fw_version >= 0x41e2b)
1199+
return true;
1200+
else
1201+
return false;
1202+
}
1203+
11961204
static void gfx_v9_0_check_if_need_gfxoff(struct amdgpu_device *adev)
11971205
{
11981206
if (gfx_v9_0_should_disable_gfxoff(adev->pdev))
@@ -1205,9 +1213,8 @@ static void gfx_v9_0_check_if_need_gfxoff(struct amdgpu_device *adev)
12051213
break;
12061214
case CHIP_RAVEN:
12071215
if (!(adev->rev_id >= 0x8 || adev->pdev->device == 0x15d8) &&
1208-
((adev->gfx.rlc_fw_version != 106 &&
1216+
((!is_raven_kicker(adev) &&
12091217
adev->gfx.rlc_fw_version < 531) ||
1210-
(adev->gfx.rlc_fw_version == 53815) ||
12111218
(adev->gfx.rlc_feature_version < 1) ||
12121219
!adev->gfx.rlc.is_rlc_v2_1))
12131220
adev->pm.pp_feature &= ~PP_GFXOFF_MASK;
@@ -3959,6 +3966,7 @@ static uint64_t gfx_v9_0_get_gpu_clock_counter(struct amdgpu_device *adev)
39593966
{
39603967
uint64_t clock;
39613968

3969+
amdgpu_gfx_off_ctrl(adev, false);
39623970
mutex_lock(&adev->gfx.gpu_clock_mutex);
39633971
if (adev->asic_type == CHIP_VEGA10 && amdgpu_sriov_runtime(adev)) {
39643972
uint32_t tmp, lsb, msb, i = 0;
@@ -3977,6 +3985,7 @@ static uint64_t gfx_v9_0_get_gpu_clock_counter(struct amdgpu_device *adev)
39773985
((uint64_t)RREG32_SOC15(GC, 0, mmRLC_GPU_CLOCK_COUNT_MSB) << 32ULL);
39783986
}
39793987
mutex_unlock(&adev->gfx.gpu_clock_mutex);
3988+
amdgpu_gfx_off_ctrl(adev, true);
39803989
return clock;
39813990
}
39823991

‎drivers/gpu/drm/amd/amdgpu/soc15.c

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -272,7 +272,12 @@ static u32 soc15_get_config_memsize(struct amdgpu_device *adev)
272272

273273
static u32 soc15_get_xclk(struct amdgpu_device *adev)
274274
{
275-
return adev->clock.spll.reference_freq;
275+
u32 reference_clock = adev->clock.spll.reference_freq;
276+
277+
if (adev->asic_type == CHIP_RAVEN)
278+
return reference_clock / 4;
279+
280+
return reference_clock;
276281
}
277282

278283

‎drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1911,7 +1911,7 @@ static void handle_hpd_irq(void *param)
19111911
mutex_lock(&aconnector->hpd_lock);
19121912

19131913
#ifdef CONFIG_DRM_AMD_DC_HDCP
1914-
if (adev->asic_type >= CHIP_RAVEN)
1914+
if (adev->dm.hdcp_workqueue)
19151915
hdcp_reset_display(adev->dm.hdcp_workqueue, aconnector->dc_link->link_index);
19161916
#endif
19171917
if (aconnector->fake_enable)
@@ -2088,8 +2088,10 @@ static void handle_hpd_rx_irq(void *param)
20882088
}
20892089
}
20902090
#ifdef CONFIG_DRM_AMD_DC_HDCP
2091-
if (hpd_irq_data.bytes.device_service_irq.bits.CP_IRQ)
2092-
hdcp_handle_cpirq(adev->dm.hdcp_workqueue, aconnector->base.index);
2091+
if (hpd_irq_data.bytes.device_service_irq.bits.CP_IRQ) {
2092+
if (adev->dm.hdcp_workqueue)
2093+
hdcp_handle_cpirq(adev->dm.hdcp_workqueue, aconnector->base.index);
2094+
}
20932095
#endif
20942096
if ((dc_link->cur_link_settings.lane_count != LANE_COUNT_UNKNOWN) ||
20952097
(dc_link->type == dc_connection_mst_branch))
@@ -5702,7 +5704,7 @@ void amdgpu_dm_connector_init_helper(struct amdgpu_display_manager *dm,
57025704
drm_connector_attach_vrr_capable_property(
57035705
&aconnector->base);
57045706
#ifdef CONFIG_DRM_AMD_DC_HDCP
5705-
if (adev->asic_type >= CHIP_RAVEN)
5707+
if (adev->dm.hdcp_workqueue)
57065708
drm_connector_attach_content_protection_property(&aconnector->base, true);
57075709
#endif
57085710
}

‎drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -46,8 +46,8 @@ static inline enum mod_hdcp_status check_hdcp2_capable(struct mod_hdcp *hdcp)
4646
enum mod_hdcp_status status;
4747

4848
if (is_dp_hdcp(hdcp))
49-
status = (hdcp->auth.msg.hdcp2.rxcaps_dp[2] & HDCP_2_2_RX_CAPS_VERSION_VAL) &&
50-
HDCP_2_2_DP_HDCP_CAPABLE(hdcp->auth.msg.hdcp2.rxcaps_dp[0]) ?
49+
status = (hdcp->auth.msg.hdcp2.rxcaps_dp[0] == HDCP_2_2_RX_CAPS_VERSION_VAL) &&
50+
HDCP_2_2_DP_HDCP_CAPABLE(hdcp->auth.msg.hdcp2.rxcaps_dp[2]) ?
5151
MOD_HDCP_STATUS_SUCCESS :
5252
MOD_HDCP_STATUS_HDCP2_NOT_CAPABLE;
5353
else

‎drivers/gpu/drm/amd/powerplay/smu_v11_0.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -898,6 +898,9 @@ int smu_v11_0_system_features_control(struct smu_context *smu,
898898
if (ret)
899899
return ret;
900900

901+
bitmap_zero(feature->enabled, feature->feature_num);
902+
bitmap_zero(feature->supported, feature->feature_num);
903+
901904
if (en) {
902905
ret = smu_feature_get_enabled_mask(smu, feature_mask, 2);
903906
if (ret)
@@ -907,9 +910,6 @@ int smu_v11_0_system_features_control(struct smu_context *smu,
907910
feature->feature_num);
908911
bitmap_copy(feature->supported, (unsigned long *)&feature_mask,
909912
feature->feature_num);
910-
} else {
911-
bitmap_zero(feature->enabled, feature->feature_num);
912-
bitmap_zero(feature->supported, feature->feature_num);
913913
}
914914

915915
return ret;

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