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Merge tag 'tegra-for-5.8-cpufreq' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers
cpufreq: Changes for v5.8-rc1 This change move Tegra20 and Tegra30 to the generic DT CPU frequency scaling driver. * tag 'tegra-for-5.8-cpufreq' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: cpufreq: tegra20: Use generic cpufreq-dt driver (Tegra30 supported now) Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
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drivers/cpufreq/Kconfig.arm

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -295,11 +295,11 @@ config ARM_TANGO_CPUFREQ
295295
default y
296296

297297
config ARM_TEGRA20_CPUFREQ
298-
tristate "Tegra20 CPUFreq support"
299-
depends on ARCH_TEGRA
298+
tristate "Tegra20/30 CPUFreq support"
299+
depends on ARCH_TEGRA && CPUFREQ_DT
300300
default y
301301
help
302-
This adds the CPUFreq driver support for Tegra20 SOCs.
302+
This adds the CPUFreq driver support for Tegra20/30 SOCs.
303303

304304
config ARM_TEGRA124_CPUFREQ
305305
bool "Tegra124 CPUFreq support"

drivers/cpufreq/tegra20-cpufreq.c

Lines changed: 56 additions & 161 deletions
Original file line numberDiff line numberDiff line change
@@ -7,201 +7,96 @@
77
* Based on arch/arm/plat-omap/cpu-omap.c, (C) 2005 Nokia Corporation
88
*/
99

10-
#include <linux/clk.h>
11-
#include <linux/cpufreq.h>
10+
#include <linux/bits.h>
11+
#include <linux/cpu.h>
1212
#include <linux/err.h>
1313
#include <linux/init.h>
1414
#include <linux/module.h>
15+
#include <linux/of_device.h>
1516
#include <linux/platform_device.h>
17+
#include <linux/pm_opp.h>
1618
#include <linux/types.h>
1719

18-
static struct cpufreq_frequency_table freq_table[] = {
19-
{ .frequency = 216000 },
20-
{ .frequency = 312000 },
21-
{ .frequency = 456000 },
22-
{ .frequency = 608000 },
23-
{ .frequency = 760000 },
24-
{ .frequency = 816000 },
25-
{ .frequency = 912000 },
26-
{ .frequency = 1000000 },
27-
{ .frequency = CPUFREQ_TABLE_END },
28-
};
29-
30-
struct tegra20_cpufreq {
31-
struct device *dev;
32-
struct cpufreq_driver driver;
33-
struct clk *cpu_clk;
34-
struct clk *pll_x_clk;
35-
struct clk *pll_p_clk;
36-
bool pll_x_prepared;
37-
};
20+
#include <soc/tegra/common.h>
21+
#include <soc/tegra/fuse.h>
3822

39-
static unsigned int tegra_get_intermediate(struct cpufreq_policy *policy,
40-
unsigned int index)
23+
static bool cpu0_node_has_opp_v2_prop(void)
4124
{
42-
struct tegra20_cpufreq *cpufreq = cpufreq_get_driver_data();
43-
unsigned int ifreq = clk_get_rate(cpufreq->pll_p_clk) / 1000;
44-
45-
/*
46-
* Don't switch to intermediate freq if:
47-
* - we are already at it, i.e. policy->cur == ifreq
48-
* - index corresponds to ifreq
49-
*/
50-
if (freq_table[index].frequency == ifreq || policy->cur == ifreq)
51-
return 0;
52-
53-
return ifreq;
54-
}
25+
struct device_node *np = of_cpu_device_node_get(0);
26+
bool ret = false;
5527

56-
static int tegra_target_intermediate(struct cpufreq_policy *policy,
57-
unsigned int index)
58-
{
59-
struct tegra20_cpufreq *cpufreq = cpufreq_get_driver_data();
60-
int ret;
61-
62-
/*
63-
* Take an extra reference to the main pll so it doesn't turn
64-
* off when we move the cpu off of it as enabling it again while we
65-
* switch to it from tegra_target() would take additional time.
66-
*
67-
* When target-freq is equal to intermediate freq we don't need to
68-
* switch to an intermediate freq and so this routine isn't called.
69-
* Also, we wouldn't be using pll_x anymore and must not take extra
70-
* reference to it, as it can be disabled now to save some power.
71-
*/
72-
clk_prepare_enable(cpufreq->pll_x_clk);
73-
74-
ret = clk_set_parent(cpufreq->cpu_clk, cpufreq->pll_p_clk);
75-
if (ret)
76-
clk_disable_unprepare(cpufreq->pll_x_clk);
77-
else
78-
cpufreq->pll_x_prepared = true;
28+
if (of_get_property(np, "operating-points-v2", NULL))
29+
ret = true;
7930

31+
of_node_put(np);
8032
return ret;
8133
}
8234

83-
static int tegra_target(struct cpufreq_policy *policy, unsigned int index)
84-
{
85-
struct tegra20_cpufreq *cpufreq = cpufreq_get_driver_data();
86-
unsigned long rate = freq_table[index].frequency;
87-
unsigned int ifreq = clk_get_rate(cpufreq->pll_p_clk) / 1000;
88-
int ret;
89-
90-
/*
91-
* target freq == pll_p, don't need to take extra reference to pll_x_clk
92-
* as it isn't used anymore.
93-
*/
94-
if (rate == ifreq)
95-
return clk_set_parent(cpufreq->cpu_clk, cpufreq->pll_p_clk);
96-
97-
ret = clk_set_rate(cpufreq->pll_x_clk, rate * 1000);
98-
/* Restore to earlier frequency on error, i.e. pll_x */
99-
if (ret)
100-
dev_err(cpufreq->dev, "Failed to change pll_x to %lu\n", rate);
101-
102-
ret = clk_set_parent(cpufreq->cpu_clk, cpufreq->pll_x_clk);
103-
/* This shouldn't fail while changing or restoring */
104-
WARN_ON(ret);
105-
106-
/*
107-
* Drop count to pll_x clock only if we switched to intermediate freq
108-
* earlier while transitioning to a target frequency.
109-
*/
110-
if (cpufreq->pll_x_prepared) {
111-
clk_disable_unprepare(cpufreq->pll_x_clk);
112-
cpufreq->pll_x_prepared = false;
113-
}
114-
115-
return ret;
116-
}
117-
118-
static int tegra_cpu_init(struct cpufreq_policy *policy)
119-
{
120-
struct tegra20_cpufreq *cpufreq = cpufreq_get_driver_data();
121-
122-
clk_prepare_enable(cpufreq->cpu_clk);
123-
124-
/* FIXME: what's the actual transition time? */
125-
cpufreq_generic_init(policy, freq_table, 300 * 1000);
126-
policy->clk = cpufreq->cpu_clk;
127-
policy->suspend_freq = freq_table[0].frequency;
128-
return 0;
129-
}
130-
131-
static int tegra_cpu_exit(struct cpufreq_policy *policy)
132-
{
133-
struct tegra20_cpufreq *cpufreq = cpufreq_get_driver_data();
134-
135-
clk_disable_unprepare(cpufreq->cpu_clk);
136-
return 0;
137-
}
138-
13935
static int tegra20_cpufreq_probe(struct platform_device *pdev)
14036
{
141-
struct tegra20_cpufreq *cpufreq;
37+
struct platform_device *cpufreq_dt;
38+
struct opp_table *opp_table;
39+
struct device *cpu_dev;
40+
u32 versions[2];
14241
int err;
14342

144-
cpufreq = devm_kzalloc(&pdev->dev, sizeof(*cpufreq), GFP_KERNEL);
145-
if (!cpufreq)
146-
return -ENOMEM;
43+
if (!cpu0_node_has_opp_v2_prop()) {
44+
dev_err(&pdev->dev, "operating points not found\n");
45+
dev_err(&pdev->dev, "please update your device tree\n");
46+
return -ENODEV;
47+
}
48+
49+
if (of_machine_is_compatible("nvidia,tegra20")) {
50+
versions[0] = BIT(tegra_sku_info.cpu_process_id);
51+
versions[1] = BIT(tegra_sku_info.soc_speedo_id);
52+
} else {
53+
versions[0] = BIT(tegra_sku_info.cpu_process_id);
54+
versions[1] = BIT(tegra_sku_info.cpu_speedo_id);
55+
}
56+
57+
dev_info(&pdev->dev, "hardware version 0x%x 0x%x\n",
58+
versions[0], versions[1]);
14759

148-
cpufreq->cpu_clk = clk_get_sys(NULL, "cclk");
149-
if (IS_ERR(cpufreq->cpu_clk))
150-
return PTR_ERR(cpufreq->cpu_clk);
60+
cpu_dev = get_cpu_device(0);
61+
if (WARN_ON(!cpu_dev))
62+
return -ENODEV;
15163

152-
cpufreq->pll_x_clk = clk_get_sys(NULL, "pll_x");
153-
if (IS_ERR(cpufreq->pll_x_clk)) {
154-
err = PTR_ERR(cpufreq->pll_x_clk);
155-
goto put_cpu;
64+
opp_table = dev_pm_opp_set_supported_hw(cpu_dev, versions, 2);
65+
err = PTR_ERR_OR_ZERO(opp_table);
66+
if (err) {
67+
dev_err(&pdev->dev, "failed to set supported hw: %d\n", err);
68+
return err;
15669
}
15770

158-
cpufreq->pll_p_clk = clk_get_sys(NULL, "pll_p");
159-
if (IS_ERR(cpufreq->pll_p_clk)) {
160-
err = PTR_ERR(cpufreq->pll_p_clk);
161-
goto put_pll_x;
71+
cpufreq_dt = platform_device_register_simple("cpufreq-dt", -1, NULL, 0);
72+
err = PTR_ERR_OR_ZERO(cpufreq_dt);
73+
if (err) {
74+
dev_err(&pdev->dev,
75+
"failed to create cpufreq-dt device: %d\n", err);
76+
goto err_put_supported_hw;
16277
}
16378

164-
cpufreq->dev = &pdev->dev;
165-
cpufreq->driver.get = cpufreq_generic_get;
166-
cpufreq->driver.attr = cpufreq_generic_attr;
167-
cpufreq->driver.init = tegra_cpu_init;
168-
cpufreq->driver.exit = tegra_cpu_exit;
169-
cpufreq->driver.flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK;
170-
cpufreq->driver.verify = cpufreq_generic_frequency_table_verify;
171-
cpufreq->driver.suspend = cpufreq_generic_suspend;
172-
cpufreq->driver.driver_data = cpufreq;
173-
cpufreq->driver.target_index = tegra_target;
174-
cpufreq->driver.get_intermediate = tegra_get_intermediate;
175-
cpufreq->driver.target_intermediate = tegra_target_intermediate;
176-
snprintf(cpufreq->driver.name, CPUFREQ_NAME_LEN, "tegra");
177-
178-
err = cpufreq_register_driver(&cpufreq->driver);
179-
if (err)
180-
goto put_pll_p;
181-
182-
platform_set_drvdata(pdev, cpufreq);
79+
platform_set_drvdata(pdev, cpufreq_dt);
18380

18481
return 0;
18582

186-
put_pll_p:
187-
clk_put(cpufreq->pll_p_clk);
188-
put_pll_x:
189-
clk_put(cpufreq->pll_x_clk);
190-
put_cpu:
191-
clk_put(cpufreq->cpu_clk);
83+
err_put_supported_hw:
84+
dev_pm_opp_put_supported_hw(opp_table);
19285

19386
return err;
19487
}
19588

19689
static int tegra20_cpufreq_remove(struct platform_device *pdev)
19790
{
198-
struct tegra20_cpufreq *cpufreq = platform_get_drvdata(pdev);
91+
struct platform_device *cpufreq_dt;
92+
struct opp_table *opp_table;
19993

200-
cpufreq_unregister_driver(&cpufreq->driver);
94+
cpufreq_dt = platform_get_drvdata(pdev);
95+
platform_device_unregister(cpufreq_dt);
20196

202-
clk_put(cpufreq->pll_p_clk);
203-
clk_put(cpufreq->pll_x_clk);
204-
clk_put(cpufreq->cpu_clk);
97+
opp_table = dev_pm_opp_get_opp_table(get_cpu_device(0));
98+
dev_pm_opp_put_supported_hw(opp_table);
99+
dev_pm_opp_put_opp_table(opp_table);
205100

206101
return 0;
207102
}

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