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arm64: dts: renesas: r9a09g047: Add CANFD node
Add CANFD node to RZ/G3E ("R9A09G047") SoC DTSI. Signed-off-by: Biju Das <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Link: https://lore.kernel.org/[email protected] Signed-off-by: Geert Uytterhoeven <[email protected]>
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arch/arm64/boot/dts/renesas/r9a09g047.dtsi

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status = "disabled";
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};
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canfd: can@12440000 {
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compatible = "renesas,r9a09g047-canfd";
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reg = <0 0x12440000 0 0x40000>;
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interrupts = <GIC_SPI 709 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 710 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 703 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 711 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 698 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 704 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 712 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 699 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 705 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 713 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 700 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 706 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 714 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 701 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 715 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 702 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 708 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 716 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "g_err", "g_recc",
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"ch0_err", "ch0_rec", "ch0_trx",
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"ch1_err", "ch1_rec", "ch1_trx",
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"ch2_err", "ch2_rec", "ch2_trx",
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"ch3_err", "ch3_rec", "ch3_trx",
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"ch4_err", "ch4_rec", "ch4_trx",
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"ch5_err", "ch5_rec", "ch5_trx";
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clocks = <&cpg CPG_MOD 0x9c>, <&cpg CPG_MOD 0x9d>,
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<&cpg CPG_MOD 0x9e>;
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clock-names = "fck", "ram_clk", "can_clk";
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assigned-clocks = <&cpg CPG_MOD 0x9e>;
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assigned-clock-rates = <80000000>;
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resets = <&cpg 0xa1>, <&cpg 0xa2>;
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reset-names = "rstp_n", "rstc_n";
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power-domains = <&cpg>;
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status = "disabled";
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channel0 {
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status = "disabled";
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};
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channel1 {
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status = "disabled";
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};
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channel2 {
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status = "disabled";
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};
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channel3 {
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status = "disabled";
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};
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channel4 {
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status = "disabled";
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};
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channel5 {
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status = "disabled";
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};
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};
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wdt1: watchdog@14400000 {
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compatible = "renesas,r9a09g047-wdt", "renesas,r9a09g057-wdt";
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reg = <0 0x14400000 0 0x400>;

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