@@ -151,6 +151,21 @@ static const struct qusb2_phy_init_tbl ipq6018_init_tbl[] = {
151151 QUSB2_PHY_INIT_CFG (QUSB2PHY_PLL_AUTOPGM_CTL1 , 0x9F ),
152152};
153153
154+ static const struct qusb2_phy_init_tbl ipq5424_init_tbl [] = {
155+ QUSB2_PHY_INIT_CFG (QUSB2PHY_PLL , 0x14 ),
156+ QUSB2_PHY_INIT_CFG_L (QUSB2PHY_PORT_TUNE1 , 0x00 ),
157+ QUSB2_PHY_INIT_CFG_L (QUSB2PHY_PORT_TUNE2 , 0x53 ),
158+ QUSB2_PHY_INIT_CFG_L (QUSB2PHY_PORT_TUNE4 , 0xc3 ),
159+ QUSB2_PHY_INIT_CFG (QUSB2PHY_PLL_TUNE , 0x30 ),
160+ QUSB2_PHY_INIT_CFG (QUSB2PHY_PLL_USER_CTL1 , 0x79 ),
161+ QUSB2_PHY_INIT_CFG (QUSB2PHY_PLL_USER_CTL2 , 0x21 ),
162+ QUSB2_PHY_INIT_CFG_L (QUSB2PHY_PORT_TUNE5 , 0x00 ),
163+ QUSB2_PHY_INIT_CFG (QUSB2PHY_PLL_PWR_CTRL , 0x00 ),
164+ QUSB2_PHY_INIT_CFG_L (QUSB2PHY_PORT_TEST2 , 0x14 ),
165+ QUSB2_PHY_INIT_CFG (QUSB2PHY_PLL_TEST , 0x80 ),
166+ QUSB2_PHY_INIT_CFG (QUSB2PHY_PLL_AUTOPGM_CTL1 , 0x9f ),
167+ };
168+
154169static const unsigned int ipq6018_regs_layout [] = {
155170 [QUSB2PHY_PLL_STATUS ] = 0x38 ,
156171 [QUSB2PHY_PORT_TUNE1 ] = 0x80 ,
@@ -331,6 +346,16 @@ static const struct qusb2_phy_cfg ipq6018_phy_cfg = {
331346 .autoresume_en = BIT (0 ),
332347};
333348
349+ static const struct qusb2_phy_cfg ipq5424_phy_cfg = {
350+ .tbl = ipq5424_init_tbl ,
351+ .tbl_num = ARRAY_SIZE (ipq5424_init_tbl ),
352+ .regs = ipq6018_regs_layout ,
353+
354+ .disable_ctrl = POWER_DOWN ,
355+ .mask_core_ready = PLL_LOCKED ,
356+ .autoresume_en = BIT (0 ),
357+ };
358+
334359static const struct qusb2_phy_cfg qusb2_v2_phy_cfg = {
335360 .tbl = qusb2_v2_init_tbl ,
336361 .tbl_num = ARRAY_SIZE (qusb2_v2_init_tbl ),
@@ -905,6 +930,9 @@ static const struct phy_ops qusb2_phy_gen_ops = {
905930
906931static const struct of_device_id qusb2_phy_of_match_table [] = {
907932 {
933+ .compatible = "qcom,ipq5424-qusb2-phy" ,
934+ .data = & ipq5424_phy_cfg ,
935+ }, {
908936 .compatible = "qcom,ipq6018-qusb2-phy" ,
909937 .data = & ipq6018_phy_cfg ,
910938 }, {
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