Skip to content

Commit 9cf93f0

Browse files
dedekindrafaeljw
authored andcommitted
intel_idle: add SnowRidge C-state table
Add C-state table for the SnowRidge SoC which is found on Intel Jacobsville platforms. The following has been changed. 1. C1E latency changed from 10us to 15us. It was measured using the open source "wult" tool (the "nic" method, 15us is the 99.99th percentile). 2. C1E power break even changed from 20us to 25us, which may result in less C1E residency in some workloads. 3. C6 latency changed from 50us to 130us. Measured the same way as C1E. The C6 C-state is supported only by some SnowRidge revisions, so add a C-state table commentary about this. On SnowRidge, C6 support is enumerated via the usual mechanism: "mwait" leaf of the "cpuid" instruction. The 'intel_idle' driver does check this leaf, so even though C6 is present in the table, the driver will only use it if the CPU does support it. Signed-off-by: Artem Bityutskiy <[email protected]> Signed-off-by: Rafael J. Wysocki <[email protected]>
1 parent 8b3fd90 commit 9cf93f0

File tree

1 file changed

+40
-1
lines changed

1 file changed

+40
-1
lines changed

drivers/idle/intel_idle.c

Lines changed: 40 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -963,6 +963,39 @@ static struct cpuidle_state dnv_cstates[] __initdata = {
963963
.enter = NULL }
964964
};
965965

966+
/*
967+
* Note, depending on HW and FW revision, SnowRidge SoC may or may not support
968+
* C6, and this is indicated in the CPUID mwait leaf.
969+
*/
970+
static struct cpuidle_state snr_cstates[] __initdata = {
971+
{
972+
.name = "C1",
973+
.desc = "MWAIT 0x00",
974+
.flags = MWAIT2flg(0x00),
975+
.exit_latency = 2,
976+
.target_residency = 2,
977+
.enter = &intel_idle,
978+
.enter_s2idle = intel_idle_s2idle, },
979+
{
980+
.name = "C1E",
981+
.desc = "MWAIT 0x01",
982+
.flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_ALWAYS_ENABLE,
983+
.exit_latency = 15,
984+
.target_residency = 25,
985+
.enter = &intel_idle,
986+
.enter_s2idle = intel_idle_s2idle, },
987+
{
988+
.name = "C6",
989+
.desc = "MWAIT 0x20",
990+
.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
991+
.exit_latency = 130,
992+
.target_residency = 500,
993+
.enter = &intel_idle,
994+
.enter_s2idle = intel_idle_s2idle, },
995+
{
996+
.enter = NULL }
997+
};
998+
966999
static const struct idle_cpu idle_cpu_nehalem __initconst = {
9671000
.state_table = nehalem_cstates,
9681001
.auto_demotion_disable_flags = NHM_C1_AUTO_DEMOTE | NHM_C3_AUTO_DEMOTE,
@@ -1084,6 +1117,12 @@ static const struct idle_cpu idle_cpu_dnv __initconst = {
10841117
.use_acpi = true,
10851118
};
10861119

1120+
static const struct idle_cpu idle_cpu_snr __initconst = {
1121+
.state_table = snr_cstates,
1122+
.disable_promotion_to_c1e = true,
1123+
.use_acpi = true,
1124+
};
1125+
10871126
static const struct x86_cpu_id intel_idle_ids[] __initconst = {
10881127
X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EP, &idle_cpu_nhx),
10891128
X86_MATCH_INTEL_FAM6_MODEL(NEHALEM, &idle_cpu_nehalem),
@@ -1122,7 +1161,7 @@ static const struct x86_cpu_id intel_idle_ids[] __initconst = {
11221161
X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT, &idle_cpu_bxt),
11231162
X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS, &idle_cpu_bxt),
11241163
X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_D, &idle_cpu_dnv),
1125-
X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, &idle_cpu_dnv),
1164+
X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, &idle_cpu_snr),
11261165
{}
11271166
};
11281167

0 commit comments

Comments
 (0)