Skip to content

Commit 9da1e9a

Browse files
computersforpeacemmind
authored andcommitted
drm/rockchip: vop: Correct RK3399 VOP register fields
Commit 7707f72 ("drm/rockchip: Add support for afbc") switched up the rk3399_vop_big[] register windows, but it did so incorrectly. The biggest problem is in rk3288_win23_data[] vs. rk3368_win23_data[] .format field: RK3288's format: VOP_REG(RK3288_WIN2_CTRL0, 0x7, 1) RK3368's format: VOP_REG(RK3368_WIN2_CTRL0, 0x3, 5) Bits 5:6 (i.e., shift 5, mask 0x3) are correct for RK3399, according to the TRM. There are a few other small differences between the 3288 and 3368 definitions that were swapped in commit 7707f72. I reviewed them to the best of my ability according to the RK3399 TRM and fixed them up. This fixes IOMMU issues (and display errors) when testing with BG24 color formats. Fixes: 7707f72 ("drm/rockchip: Add support for afbc") Cc: Andrzej Pietrasiewicz <[email protected]> Cc: <[email protected]> Signed-off-by: Brian Norris <[email protected]> Tested-by: Andrzej Pietrasiewicz <[email protected]> Signed-off-by: Heiko Stuebner <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/20220119161104.1.I1d01436bef35165a8cdfe9308789c0badb5ff46a@changeid
1 parent c0cfbb1 commit 9da1e9a

File tree

1 file changed

+5
-3
lines changed

1 file changed

+5
-3
lines changed

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -902,6 +902,7 @@ static const struct vop_win_phy rk3399_win01_data = {
902902
.enable = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 0),
903903
.format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1),
904904
.rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12),
905+
.x_mir_en = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 21),
905906
.y_mir_en = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 22),
906907
.act_info = VOP_REG(RK3288_WIN0_ACT_INFO, 0x1fff1fff, 0),
907908
.dsp_info = VOP_REG(RK3288_WIN0_DSP_INFO, 0x0fff0fff, 0),
@@ -912,6 +913,7 @@ static const struct vop_win_phy rk3399_win01_data = {
912913
.uv_vir = VOP_REG(RK3288_WIN0_VIR, 0x3fff, 16),
913914
.src_alpha_ctl = VOP_REG(RK3288_WIN0_SRC_ALPHA_CTRL, 0xff, 0),
914915
.dst_alpha_ctl = VOP_REG(RK3288_WIN0_DST_ALPHA_CTRL, 0xff, 0),
916+
.channel = VOP_REG(RK3288_WIN0_CTRL2, 0xff, 0),
915917
};
916918

917919
/*
@@ -922,11 +924,11 @@ static const struct vop_win_phy rk3399_win01_data = {
922924
static const struct vop_win_data rk3399_vop_win_data[] = {
923925
{ .base = 0x00, .phy = &rk3399_win01_data,
924926
.type = DRM_PLANE_TYPE_PRIMARY },
925-
{ .base = 0x40, .phy = &rk3288_win01_data,
927+
{ .base = 0x40, .phy = &rk3368_win01_data,
926928
.type = DRM_PLANE_TYPE_OVERLAY },
927-
{ .base = 0x00, .phy = &rk3288_win23_data,
929+
{ .base = 0x00, .phy = &rk3368_win23_data,
928930
.type = DRM_PLANE_TYPE_OVERLAY },
929-
{ .base = 0x50, .phy = &rk3288_win23_data,
931+
{ .base = 0x50, .phy = &rk3368_win23_data,
930932
.type = DRM_PLANE_TYPE_CURSOR },
931933
};
932934

0 commit comments

Comments
 (0)