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Merge tag 'amd-drm-next-6.2-2022-12-02' of https://gitlab.freedesktop.org/agd5f/linux into drm-next
amd-drm-next-6.2-2022-12-02: amdgpu: - Fix CPU stalls when allocating large amounts of system memory - SR-IOV fixes - BACO fixes - Enable GC 11.0.4 - Enable PSP 13.0.11 - Enable SMU 13.0.11 - Enable NBIO 7.7.1 - Fix reported VCN capabilities for RDNA2 - Misc cleanups - PCI ref count fixes - DCN DPIA fixes - DCN 3.2.x fixes - Documentation updates - GC 11.x fixes - VCN RAS fixes - APU fix for passthrough - PSR fixes - GFX preemption support for gfx9 - SDMA fix for S0ix amdkfd: - Enable KFD support for GC 11.0.4 - Misc cleanups - Fix memory leak Signed-off-by: Dave Airlie <[email protected]> From: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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‎Documentation/gpu/amdgpu/amdgpu-glossary.rst

Lines changed: 23 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -30,12 +30,35 @@ we have a dedicated glossary for Display Core at
3030
EOP
3131
End Of Pipe/Pipeline
3232

33+
GART
34+
Graphics Address Remapping Table. This is the name we use for the GPUVM
35+
page table used by the GPU kernel driver. It remaps system resources
36+
(memory or MMIO space) into the GPU's address space so the GPU can access
37+
them. The name GART harkens back to the days of AGP when the platform
38+
provided an MMU that the GPU could use to get a contiguous view of
39+
scattered pages for DMA. The MMU has since moved on to the GPU, but the
40+
name stuck.
41+
3342
GC
3443
Graphics and Compute
3544

3645
GMC
3746
Graphic Memory Controller
3847

48+
GPUVM
49+
GPU Virtual Memory. This is the GPU's MMU. The GPU supports multiple
50+
virtual address spaces that can be in flight at any given time. These
51+
allow the GPU to remap VRAM and system resources into GPU virtual address
52+
spaces for use by the GPU kernel driver and applications using the GPU.
53+
These provide memory protection for different applications using the GPU.
54+
55+
GTT
56+
Graphics Translation Tables. This is a memory pool managed through TTM
57+
which provides access to system resources (memory or MMIO space) for
58+
use by the GPU. These addresses can be mapped into the "GART" GPUVM page
59+
table for use by the kernel driver or into per process GPUVM page tables
60+
for application usage.
61+
3962
IH
4063
Interrupt Handler
4164

‎Documentation/gpu/amdgpu/driver-core.rst

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -148,10 +148,10 @@ PRIME Buffer Sharing
148148
MMU Notifier
149149
============
150150

151-
.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c
151+
.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_hmm.c
152152
:doc: MMU Notifier
153153

154-
.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c
154+
.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_hmm.c
155155
:internal:
156156

157157
AMDGPU Virtual Memory

‎Documentation/gpu/amdgpu/index.rst

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@
33
==========================
44

55
The drm/amdgpu driver supports all AMD Radeon GPUs based on the Graphics Core
6-
Next (GCN) architecture.
6+
Next (GCN), Radeon DNA (RDNA), and Compute DNA (CDNA) architectures.
77

88
.. toctree::
99

‎drivers/gpu/drm/amd/amdgpu/Makefile

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -58,7 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \
5858
amdgpu_vm_sdma.o amdgpu_discovery.o amdgpu_ras_eeprom.o amdgpu_nbio.o \
5959
amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \
6060
amdgpu_fw_attestation.o amdgpu_securedisplay.o \
61-
amdgpu_eeprom.o amdgpu_mca.o amdgpu_psp_ta.o amdgpu_lsdma.o
61+
amdgpu_eeprom.o amdgpu_mca.o amdgpu_psp_ta.o amdgpu_lsdma.o \
62+
amdgpu_ring_mux.o
6263

6364
amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o
6465

‎drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2204,7 +2204,7 @@ int amdgpu_amdkfd_gpuvm_import_dmabuf(struct amdgpu_device *adev,
22042204

22052205
ret = drm_vma_node_allow(&obj->vma_node, drm_priv);
22062206
if (ret) {
2207-
kfree(mem);
2207+
kfree(*mem);
22082208
return ret;
22092209
}
22102210

‎drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c

Lines changed: 11 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -104,7 +104,7 @@ void amdgpu_atomfirmware_scratch_regs_init(struct amdgpu_device *adev)
104104
static int amdgpu_atomfirmware_allocate_fb_v2_1(struct amdgpu_device *adev,
105105
struct vram_usagebyfirmware_v2_1 *fw_usage, int *usage_bytes)
106106
{
107-
uint32_t start_addr, fw_size, drv_size;
107+
u32 start_addr, fw_size, drv_size;
108108

109109
start_addr = le32_to_cpu(fw_usage->start_address_in_kb);
110110
fw_size = le16_to_cpu(fw_usage->used_by_firmware_in_kb);
@@ -116,7 +116,7 @@ static int amdgpu_atomfirmware_allocate_fb_v2_1(struct amdgpu_device *adev,
116116
drv_size);
117117

118118
if ((start_addr & ATOM_VRAM_OPERATION_FLAGS_MASK) ==
119-
(uint32_t)(ATOM_VRAM_BLOCK_SRIOV_MSG_SHARE_RESERVATION <<
119+
(u32)(ATOM_VRAM_BLOCK_SRIOV_MSG_SHARE_RESERVATION <<
120120
ATOM_VRAM_OPERATION_FLAGS_SHIFT)) {
121121
/* Firmware request VRAM reservation for SR-IOV */
122122
adev->mman.fw_vram_usage_start_offset = (start_addr &
@@ -133,7 +133,7 @@ static int amdgpu_atomfirmware_allocate_fb_v2_1(struct amdgpu_device *adev,
133133
static int amdgpu_atomfirmware_allocate_fb_v2_2(struct amdgpu_device *adev,
134134
struct vram_usagebyfirmware_v2_2 *fw_usage, int *usage_bytes)
135135
{
136-
uint32_t fw_start_addr, fw_size, drv_start_addr, drv_size;
136+
u32 fw_start_addr, fw_size, drv_start_addr, drv_size;
137137

138138
fw_start_addr = le32_to_cpu(fw_usage->fw_region_start_address_in_kb);
139139
fw_size = le16_to_cpu(fw_usage->used_by_firmware_in_kb);
@@ -147,14 +147,18 @@ static int amdgpu_atomfirmware_allocate_fb_v2_2(struct amdgpu_device *adev,
147147
drv_start_addr,
148148
drv_size);
149149

150-
if ((fw_start_addr & (ATOM_VRAM_BLOCK_NEEDS_NO_RESERVATION << 30)) == 0) {
150+
if (amdgpu_sriov_vf(adev) &&
151+
((fw_start_addr & (ATOM_VRAM_BLOCK_NEEDS_NO_RESERVATION <<
152+
ATOM_VRAM_OPERATION_FLAGS_SHIFT)) == 0)) {
151153
/* Firmware request VRAM reservation for SR-IOV */
152154
adev->mman.fw_vram_usage_start_offset = (fw_start_addr &
153155
(~ATOM_VRAM_OPERATION_FLAGS_MASK)) << 10;
154156
adev->mman.fw_vram_usage_size = fw_size << 10;
155157
}
156158

157-
if ((drv_start_addr & (ATOM_VRAM_BLOCK_NEEDS_NO_RESERVATION << 30)) == 0) {
159+
if (amdgpu_sriov_vf(adev) &&
160+
((drv_start_addr & (ATOM_VRAM_BLOCK_NEEDS_NO_RESERVATION <<
161+
ATOM_VRAM_OPERATION_FLAGS_SHIFT)) == 0)) {
158162
/* driver request VRAM reservation for SR-IOV */
159163
adev->mman.drv_vram_usage_start_offset = (drv_start_addr &
160164
(~ATOM_VRAM_OPERATION_FLAGS_MASK)) << 10;
@@ -172,8 +176,8 @@ int amdgpu_atomfirmware_allocate_fb_scratch(struct amdgpu_device *adev)
172176
vram_usagebyfirmware);
173177
struct vram_usagebyfirmware_v2_1 *fw_usage_v2_1;
174178
struct vram_usagebyfirmware_v2_2 *fw_usage_v2_2;
175-
uint16_t data_offset;
176-
uint8_t frev, crev;
179+
u16 data_offset;
180+
u8 frev, crev;
177181
int usage_bytes = 0;
178182

179183
if (amdgpu_atom_parse_data_header(ctx, index, NULL, &frev, &crev, &data_offset)) {

‎drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -317,6 +317,7 @@ static bool amdgpu_atrm_get_bios(struct amdgpu_device *adev)
317317

318318
if (!found)
319319
return false;
320+
pci_dev_put(pdev);
320321

321322
adev->bios = kmalloc(size, GFP_KERNEL);
322323
if (!adev->bios) {

‎drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2473,6 +2473,11 @@ static int amdgpu_device_ip_init(struct amdgpu_device *adev)
24732473
if (!amdgpu_sriov_vf(adev)) {
24742474
struct amdgpu_hive_info *hive = amdgpu_get_xgmi_hive(adev);
24752475

2476+
if (WARN_ON(!hive)) {
2477+
r = -ENOENT;
2478+
goto init_failed;
2479+
}
2480+
24762481
if (!hive->reset_domain ||
24772482
!amdgpu_reset_get_reset_domain(hive->reset_domain)) {
24782483
r = -ENOENT;

‎drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1512,6 +1512,7 @@ static int amdgpu_discovery_set_common_ip_blocks(struct amdgpu_device *adev)
15121512
case IP_VERSION(11, 0, 1):
15131513
case IP_VERSION(11, 0, 2):
15141514
case IP_VERSION(11, 0, 3):
1515+
case IP_VERSION(11, 0, 4):
15151516
amdgpu_device_ip_block_add(adev, &soc21_common_ip_block);
15161517
break;
15171518
default:
@@ -1556,6 +1557,7 @@ static int amdgpu_discovery_set_gmc_ip_blocks(struct amdgpu_device *adev)
15561557
case IP_VERSION(11, 0, 1):
15571558
case IP_VERSION(11, 0, 2):
15581559
case IP_VERSION(11, 0, 3):
1560+
case IP_VERSION(11, 0, 4):
15591561
amdgpu_device_ip_block_add(adev, &gmc_v11_0_ip_block);
15601562
break;
15611563
default:
@@ -1641,6 +1643,7 @@ static int amdgpu_discovery_set_psp_ip_blocks(struct amdgpu_device *adev)
16411643
case IP_VERSION(13, 0, 7):
16421644
case IP_VERSION(13, 0, 8):
16431645
case IP_VERSION(13, 0, 10):
1646+
case IP_VERSION(13, 0, 11):
16441647
amdgpu_device_ip_block_add(adev, &psp_v13_0_ip_block);
16451648
break;
16461649
case IP_VERSION(13, 0, 4):
@@ -1691,6 +1694,7 @@ static int amdgpu_discovery_set_smu_ip_blocks(struct amdgpu_device *adev)
16911694
case IP_VERSION(13, 0, 7):
16921695
case IP_VERSION(13, 0, 8):
16931696
case IP_VERSION(13, 0, 10):
1697+
case IP_VERSION(13, 0, 11):
16941698
amdgpu_device_ip_block_add(adev, &smu_v13_0_ip_block);
16951699
break;
16961700
default:
@@ -1804,6 +1808,7 @@ static int amdgpu_discovery_set_gc_ip_blocks(struct amdgpu_device *adev)
18041808
case IP_VERSION(11, 0, 1):
18051809
case IP_VERSION(11, 0, 2):
18061810
case IP_VERSION(11, 0, 3):
1811+
case IP_VERSION(11, 0, 4):
18071812
amdgpu_device_ip_block_add(adev, &gfx_v11_0_ip_block);
18081813
break;
18091814
default:
@@ -1967,6 +1972,7 @@ static int amdgpu_discovery_set_mes_ip_blocks(struct amdgpu_device *adev)
19671972
case IP_VERSION(11, 0, 1):
19681973
case IP_VERSION(11, 0, 2):
19691974
case IP_VERSION(11, 0, 3):
1975+
case IP_VERSION(11, 0, 4):
19701976
amdgpu_device_ip_block_add(adev, &mes_v11_0_ip_block);
19711977
adev->enable_mes = true;
19721978
adev->enable_mes_kiq = true;
@@ -2197,6 +2203,7 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev)
21972203
adev->family = AMDGPU_FAMILY_GC_11_0_0;
21982204
break;
21992205
case IP_VERSION(11, 0, 1):
2206+
case IP_VERSION(11, 0, 4):
22002207
adev->family = AMDGPU_FAMILY_GC_11_0_1;
22012208
break;
22022209
default:
@@ -2214,6 +2221,7 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev)
22142221
case IP_VERSION(10, 3, 6):
22152222
case IP_VERSION(10, 3, 7):
22162223
case IP_VERSION(11, 0, 1):
2224+
case IP_VERSION(11, 0, 4):
22172225
adev->flags |= AMD_IS_APU;
22182226
break;
22192227
default:
@@ -2270,6 +2278,7 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev)
22702278
adev->nbio.hdp_flush_reg = &nbio_v4_3_hdp_flush_reg;
22712279
break;
22722280
case IP_VERSION(7, 7, 0):
2281+
case IP_VERSION(7, 7, 1):
22732282
adev->nbio.funcs = &nbio_v7_7_funcs;
22742283
adev->nbio.hdp_flush_reg = &nbio_v7_7_hdp_flush_reg;
22752284
break;

‎drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

Lines changed: 8 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -231,16 +231,18 @@ module_param_named(vis_vramlimit, amdgpu_vis_vram_limit, int, 0444);
231231

232232
/**
233233
* DOC: gartsize (uint)
234-
* Restrict the size of GART in Mib (32, 64, etc.) for testing. The default is -1 (The size depends on asic).
234+
* Restrict the size of GART (for kernel use) in Mib (32, 64, etc.) for testing.
235+
* The default is -1 (The size depends on asic).
235236
*/
236-
MODULE_PARM_DESC(gartsize, "Size of GART to setup in megabytes (32, 64, etc., -1=auto)");
237+
MODULE_PARM_DESC(gartsize, "Size of kernel GART to setup in megabytes (32, 64, etc., -1=auto)");
237238
module_param_named(gartsize, amdgpu_gart_size, uint, 0600);
238239

239240
/**
240241
* DOC: gttsize (int)
241-
* Restrict the size of GTT domain in MiB for testing. The default is -1 (Use 1/2 RAM, minimum value is 3GB).
242+
* Restrict the size of GTT domain (for userspace use) in MiB for testing.
243+
* The default is -1 (Use 1/2 RAM, minimum value is 3GB).
242244
*/
243-
MODULE_PARM_DESC(gttsize, "Size of the GTT domain in megabytes (-1 = auto)");
245+
MODULE_PARM_DESC(gttsize, "Size of the GTT userspace domain in megabytes (-1 = auto)");
244246
module_param_named(gttsize, amdgpu_gtt_size, int, 0600);
245247

246248
/**
@@ -2569,6 +2571,8 @@ static int amdgpu_pmops_runtime_suspend(struct device *dev)
25692571
amdgpu_device_baco_enter(drm_dev);
25702572
}
25712573

2574+
dev_dbg(&pdev->dev, "asic/device is runtime suspended\n");
2575+
25722576
return 0;
25732577
}
25742578

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