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Merge tag 'reset-for-v5.9' of git://git.pengutronix.de/pza/linux into arm/drivers
Reset controller updates for v5.9 This tag moves the reset-simple header out of drivers/reset for use by drivers outside of drivers/reset, adds a .reset() callback to reset-simple, converts i.MX reset bindings to json-schema, fixes a compile warning in the reset-intel-gw driver, and replaces some HTTP links with HTTPS ones in comments. * tag 'reset-for-v5.9' of git://git.pengutronix.de/pza/linux: reset: Replace HTTP links with HTTPS ones reset: intel: fix a compile warning about REG_OFFSET redefined dt-bindings: reset: Convert i.MX7 reset to json-schema dt-bindings: reset: Convert i.MX reset to json-schema reset: simple: Add reset callback reset: Move reset-simple header out of drivers/reset Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
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‎Documentation/devicetree/bindings/reset/fsl,imx-src.txt

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‎Documentation/devicetree/bindings/reset/fsl,imx-src.yaml

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@@ -0,0 +1,82 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/reset/fsl,imx-src.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Freescale i.MX System Reset Controller
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maintainers:
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- Philipp Zabel <[email protected]>
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description: |
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The system reset controller can be used to reset the GPU, VPU,
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IPU, and OpenVG IP modules on i.MX5 and i.MX6 ICs. Those device
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nodes should specify the reset line on the SRC in their resets
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property, containing a phandle to the SRC device node and a
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RESET_INDEX specifying which module to reset, as described in
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reset.txt
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The following RESET_INDEX values are valid for i.MX5:
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GPU_RESET 0
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VPU_RESET 1
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IPU1_RESET 2
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OPEN_VG_RESET 3
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The following additional RESET_INDEX value is valid for i.MX6:
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IPU2_RESET 4
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properties:
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compatible:
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oneOf:
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- const: "fsl,imx51-src"
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- items:
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- const: "fsl,imx50-src"
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- const: "fsl,imx51-src"
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- items:
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- const: "fsl,imx53-src"
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- const: "fsl,imx51-src"
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- items:
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- const: "fsl,imx6q-src"
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- const: "fsl,imx51-src"
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- items:
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- const: "fsl,imx6sx-src"
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- const: "fsl,imx51-src"
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- items:
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- const: "fsl,imx6sl-src"
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- const: "fsl,imx51-src"
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- items:
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- const: "fsl,imx6ul-src"
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- const: "fsl,imx51-src"
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- items:
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- const: "fsl,imx6sll-src"
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- const: "fsl,imx51-src"
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reg:
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maxItems: 1
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interrupts:
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items:
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- description: SRC interrupt
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- description: CPU WDOG interrupts out of SRC
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minItems: 1
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maxItems: 2
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'#reset-cells':
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const: 1
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required:
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- compatible
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- reg
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- interrupts
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- '#reset-cells'
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additionalProperties: false
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examples:
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- |
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reset-controller@73fd0000 {
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compatible = "fsl,imx51-src";
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reg = <0x73fd0000 0x4000>;
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interrupts = <75>;
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#reset-cells = <1>;
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};

‎Documentation/devicetree/bindings/reset/fsl,imx7-src.txt

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‎Documentation/devicetree/bindings/reset/fsl,imx7-src.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/reset/fsl,imx7-src.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Freescale i.MX7 System Reset Controller
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maintainers:
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- Andrey Smirnov <[email protected]>
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description: |
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The system reset controller can be used to reset various set of
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peripherals. Device nodes that need access to reset lines should
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specify them as a reset phandle in their corresponding node as
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specified in reset.txt.
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For list of all valid reset indices see
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<dt-bindings/reset/imx7-reset.h> for i.MX7,
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<dt-bindings/reset/imx8mq-reset.h> for i.MX8MQ, i.MX8MM and i.MX8MN,
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<dt-bindings/reset/imx8mp-reset.h> for i.MX8MP.
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properties:
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compatible:
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items:
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- enum:
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- fsl,imx7d-src
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- fsl,imx8mq-src
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- fsl,imx8mp-src
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- const: syscon
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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'#reset-cells':
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const: 1
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required:
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- compatible
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- reg
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- interrupts
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- '#reset-cells'
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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reset-controller@30390000 {
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compatible = "fsl,imx7d-src", "syscon";
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reg = <0x30390000 0x2000>;
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interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
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#reset-cells = <1>;
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};

‎drivers/reset/reset-intel-gw.c

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Original file line numberDiff line numberDiff line change
@@ -15,9 +15,9 @@
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#define RCU_RST_STAT 0x0024
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#define RCU_RST_REQ 0x0048
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18-
#define REG_OFFSET GENMASK(31, 16)
19-
#define BIT_OFFSET GENMASK(15, 8)
20-
#define STAT_BIT_OFFSET GENMASK(7, 0)
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#define REG_OFFSET_MASK GENMASK(31, 16)
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#define BIT_OFFSET_MASK GENMASK(15, 8)
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#define STAT_BIT_OFFSET_MASK GENMASK(7, 0)
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#define to_reset_data(x) container_of(x, struct intel_reset_data, rcdev)
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@@ -51,11 +51,11 @@ static u32 id_to_reg_and_bit_offsets(struct intel_reset_data *data,
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unsigned long id, u32 *rst_req,
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u32 *req_bit, u32 *stat_bit)
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{
54-
*rst_req = FIELD_GET(REG_OFFSET, id);
55-
*req_bit = FIELD_GET(BIT_OFFSET, id);
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*rst_req = FIELD_GET(REG_OFFSET_MASK, id);
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*req_bit = FIELD_GET(BIT_OFFSET_MASK, id);
5656

5757
if (data->soc_data->legacy)
58-
*stat_bit = FIELD_GET(STAT_BIT_OFFSET, id);
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*stat_bit = FIELD_GET(STAT_BIT_OFFSET_MASK, id);
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else
6060
*stat_bit = *req_bit;
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@@ -141,14 +141,14 @@ static int intel_reset_xlate(struct reset_controller_dev *rcdev,
141141
if (spec->args[1] > 31)
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return -EINVAL;
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144-
id = FIELD_PREP(REG_OFFSET, spec->args[0]);
145-
id |= FIELD_PREP(BIT_OFFSET, spec->args[1]);
144+
id = FIELD_PREP(REG_OFFSET_MASK, spec->args[0]);
145+
id |= FIELD_PREP(BIT_OFFSET_MASK, spec->args[1]);
146146

147147
if (data->soc_data->legacy) {
148148
if (spec->args[2] > 31)
149149
return -EINVAL;
150150

151-
id |= FIELD_PREP(STAT_BIT_OFFSET, spec->args[2]);
151+
id |= FIELD_PREP(STAT_BIT_OFFSET_MASK, spec->args[2]);
152152
}
153153

154154
return id;
@@ -210,11 +210,11 @@ static int intel_reset_probe(struct platform_device *pdev)
210210
if (ret)
211211
return ret;
212212

213-
data->reboot_id = FIELD_PREP(REG_OFFSET, rb_id[0]);
214-
data->reboot_id |= FIELD_PREP(BIT_OFFSET, rb_id[1]);
213+
data->reboot_id = FIELD_PREP(REG_OFFSET_MASK, rb_id[0]);
214+
data->reboot_id |= FIELD_PREP(BIT_OFFSET_MASK, rb_id[1]);
215215

216216
if (data->soc_data->legacy)
217-
data->reboot_id |= FIELD_PREP(STAT_BIT_OFFSET, rb_id[2]);
217+
data->reboot_id |= FIELD_PREP(STAT_BIT_OFFSET_MASK, rb_id[2]);
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data->restart_nb.notifier_call = intel_reset_restart_handler;
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data->restart_nb.priority = 128;

‎drivers/reset/reset-simple.c

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@@ -11,17 +11,17 @@
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* Maxime Ripard <[email protected]>
1212
*/
1313

14+
#include <linux/delay.h>
1415
#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/of.h>
1819
#include <linux/of_device.h>
1920
#include <linux/platform_device.h>
2021
#include <linux/reset-controller.h>
22+
#include <linux/reset/reset-simple.h>
2123
#include <linux/spinlock.h>
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23-
#include "reset-simple.h"
24-
2525
static inline struct reset_simple_data *
2626
to_reset_simple_data(struct reset_controller_dev *rcdev)
2727
{
@@ -64,6 +64,24 @@ static int reset_simple_deassert(struct reset_controller_dev *rcdev,
6464
return reset_simple_update(rcdev, id, false);
6565
}
6666

67+
static int reset_simple_reset(struct reset_controller_dev *rcdev,
68+
unsigned long id)
69+
{
70+
struct reset_simple_data *data = to_reset_simple_data(rcdev);
71+
int ret;
72+
73+
if (!data->reset_us)
74+
return -ENOTSUPP;
75+
76+
ret = reset_simple_assert(rcdev, id);
77+
if (ret)
78+
return ret;
79+
80+
usleep_range(data->reset_us, data->reset_us * 2);
81+
82+
return reset_simple_deassert(rcdev, id);
83+
}
84+
6785
static int reset_simple_status(struct reset_controller_dev *rcdev,
6886
unsigned long id)
6987
{
@@ -81,6 +99,7 @@ static int reset_simple_status(struct reset_controller_dev *rcdev,
8199
const struct reset_control_ops reset_simple_ops = {
82100
.assert = reset_simple_assert,
83101
.deassert = reset_simple_deassert,
102+
.reset = reset_simple_reset,
84103
.status = reset_simple_status,
85104
};
86105
EXPORT_SYMBOL_GPL(reset_simple_ops);

‎drivers/reset/reset-socfpga.c

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@@ -11,13 +11,12 @@
1111
#include <linux/of_address.h>
1212
#include <linux/platform_device.h>
1313
#include <linux/reset-controller.h>
14+
#include <linux/reset/reset-simple.h>
1415
#include <linux/reset/socfpga.h>
1516
#include <linux/slab.h>
1617
#include <linux/spinlock.h>
1718
#include <linux/types.h>
1819

19-
#include "reset-simple.h"
20-
2120
#define SOCFPGA_NR_BANKS 8
2221

2322
static int a10_reset_init(struct device_node *np)

‎drivers/reset/reset-sunxi.c

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1414
#include <linux/of_address.h>
1515
#include <linux/platform_device.h>
1616
#include <linux/reset-controller.h>
17+
#include <linux/reset/reset-simple.h>
1718
#include <linux/reset/sunxi.h>
1819
#include <linux/slab.h>
1920
#include <linux/spinlock.h>
2021
#include <linux/types.h>
2122

22-
#include "reset-simple.h"
23-
2423
static int sunxi_reset_init(struct device_node *np)
2524
{
2625
struct reset_simple_data *data;

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