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brooniebebarino
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clk: versaclock7: Convert to use maple tree register cache
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by: Mark Brown <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Stephen Boyd <[email protected]>
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drivers/clk/clk-versaclock7.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1275,7 +1275,7 @@ static const struct regmap_config vc7_regmap_config = {
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.ranges = vc7_range_cfg,
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.num_ranges = ARRAY_SIZE(vc7_range_cfg),
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.volatile_reg = vc7_volatile_reg,
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.cache_type = REGCACHE_RBTREE,
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.cache_type = REGCACHE_MAPLE,
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.can_multi_write = true,
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.reg_format_endian = REGMAP_ENDIAN_LITTLE,
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.val_format_endian = REGMAP_ENDIAN_LITTLE,

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