@@ -1496,8 +1496,7 @@ static u64 read_sanitised_id_aa64dfr0_el1(struct kvm_vcpu *vcpu,
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{
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u64 val = read_sanitised_ftr_reg (SYS_ID_AA64DFR0_EL1 );
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- /* Limit debug to ARMv8.0 */
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- val = ID_REG_LIMIT_FIELD_ENUM (val , ID_AA64DFR0_EL1 , DebugVer , IMP );
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+ val = ID_REG_LIMIT_FIELD_ENUM (val , ID_AA64DFR0_EL1 , DebugVer , V8P8 );
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/*
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* Only initialize the PMU version if the vCPU was configured with one.
@@ -1557,6 +1556,8 @@ static u64 read_sanitised_id_dfr0_el1(struct kvm_vcpu *vcpu,
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if (kvm_vcpu_has_pmu (vcpu ))
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val |= SYS_FIELD_PREP (ID_DFR0_EL1 , PerfMon , perfmon );
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+ val = ID_REG_LIMIT_FIELD_ENUM (val , ID_DFR0_EL1 , CopDbg , Debugv8p8 );
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+
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return val ;
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}
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@@ -2013,7 +2014,8 @@ static const struct sys_reg_desc sys_reg_descs[] = {
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.set_user = set_id_dfr0_el1 ,
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.visibility = aa32_id_visibility ,
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.reset = read_sanitised_id_dfr0_el1 ,
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- .val = ID_DFR0_EL1_PerfMon_MASK , },
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+ .val = ID_DFR0_EL1_PerfMon_MASK |
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+ ID_DFR0_EL1_CopDbg_MASK , },
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ID_HIDDEN (ID_AFR0_EL1 ),
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AA32_ID_SANITISED (ID_MMFR0_EL1 ),
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AA32_ID_SANITISED (ID_MMFR1_EL1 ),
@@ -2062,7 +2064,8 @@ static const struct sys_reg_desc sys_reg_descs[] = {
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.get_user = get_id_reg ,
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.set_user = set_id_aa64dfr0_el1 ,
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.reset = read_sanitised_id_aa64dfr0_el1 ,
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- .val = ID_AA64DFR0_EL1_PMUVer_MASK , },
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+ .val = ID_AA64DFR0_EL1_PMUVer_MASK |
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+ ID_AA64DFR0_EL1_DebugVer_MASK , },
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ID_SANITISED (ID_AA64DFR1_EL1 ),
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ID_UNALLOCATED (5 ,2 ),
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ID_UNALLOCATED (5 ,3 ),
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