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Merge branch 'omap-for-v5.6/sdma' into omap-for-v5.6/ti-sysc-drop-pdata
2 parents 6e678a7 + 37b156e commit 9fc85a7

26 files changed

+389
-1160
lines changed

‎arch/arm/boot/dts/dra7-l4.dtsi

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -186,7 +186,6 @@
186186

187187
target-module@56000 { /* 0x4a056000, ap 9 02.0 */
188188
compatible = "ti,sysc-omap2", "ti,sysc";
189-
ti,hwmods = "dma_system";
190189
reg = <0x56000 0x4>,
191190
<0x5602c 0x4>,
192191
<0x56028 0x4>;
@@ -212,7 +211,7 @@
212211
ranges = <0x0 0x56000 0x1000>;
213212

214213
sdma: dma-controller@0 {
215-
compatible = "ti,omap4430-sdma";
214+
compatible = "ti,omap4430-sdma", "ti,omap-sdma";
216215
reg = <0x0 0x1000>;
217216
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
218217
<GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,

‎arch/arm/boot/dts/omap2.dtsi

Lines changed: 32 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -8,6 +8,7 @@
88
* kind, whether express or implied.
99
*/
1010

11+
#include <dt-bindings/bus/ti-sysc.h>
1112
#include <dt-bindings/gpio/gpio.h>
1213
#include <dt-bindings/interrupt-controller/irq.h>
1314
#include <dt-bindings/pinctrl/omap.h>
@@ -79,17 +80,37 @@
7980
reg = <0x480FE000 0x1000>;
8081
};
8182

82-
sdma: dma-controller@48056000 {
83-
compatible = "ti,omap2430-sdma", "ti,omap2420-sdma";
84-
ti,hwmods = "dma";
85-
reg = <0x48056000 0x1000>;
86-
interrupts = <12>,
87-
<13>,
88-
<14>,
89-
<15>;
90-
#dma-cells = <1>;
91-
dma-channels = <32>;
92-
dma-requests = <64>;
83+
target-module@48056000 {
84+
compatible = "ti,sysc-omap2", "ti,sysc";
85+
reg = <0x48056000 0x4>,
86+
<0x4805602c 0x4>,
87+
<0x48056028 0x4>;
88+
reg-names = "rev", "sysc", "syss";
89+
ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
90+
SYSC_OMAP2_EMUFREE |
91+
SYSC_OMAP2_SOFTRESET |
92+
SYSC_OMAP2_AUTOIDLE)>;
93+
ti,sysc-midle = <SYSC_IDLE_FORCE>,
94+
<SYSC_IDLE_NO>,
95+
<SYSC_IDLE_SMART>;
96+
ti,syss-mask = <1>;
97+
clocks = <&core_l3_ck>;
98+
clock-names = "fck";
99+
#address-cells = <1>;
100+
#size-cells = <1>;
101+
ranges = <0 0x48056000 0x1000>;
102+
103+
sdma: dma-controller@0 {
104+
compatible = "ti,omap2420-sdma", "ti,omap-sdma";
105+
reg = <0 0x1000>;
106+
interrupts = <12>,
107+
<13>,
108+
<14>,
109+
<15>;
110+
#dma-cells = <1>;
111+
dma-channels = <32>;
112+
dma-requests = <64>;
113+
};
93114
};
94115

95116
i2c1: i2c@48070000 {

‎arch/arm/boot/dts/omap2430.dtsi

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -309,6 +309,10 @@
309309
};
310310
};
311311

312+
&sdma {
313+
compatible = "ti,omap2430-sdma", "ti,omap-sdma";
314+
};
315+
312316
&i2c1 {
313317
compatible = "ti,omap2430-i2c";
314318
};

‎arch/arm/boot/dts/omap3-n900.dts

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -482,6 +482,11 @@
482482
regulator-always-on;
483483
};
484484

485+
/* First two dma channels are reserved on secure omap3 */
486+
&sdma {
487+
dma-channel-mask = <0xfffffffc>;
488+
};
489+
485490
&twl {
486491
twl_audio: audio {
487492
compatible = "ti,twl4030-audio";

‎arch/arm/boot/dts/omap3.dtsi

Lines changed: 35 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -206,17 +206,41 @@
206206
reg = <0x48200000 0x1000>;
207207
};
208208

209-
sdma: dma-controller@48056000 {
210-
compatible = "ti,omap3630-sdma", "ti,omap3430-sdma";
211-
reg = <0x48056000 0x1000>;
212-
interrupts = <12>,
213-
<13>,
214-
<14>,
215-
<15>;
216-
#dma-cells = <1>;
217-
dma-channels = <32>;
218-
dma-requests = <96>;
219-
ti,hwmods = "dma";
209+
target-module@48056000 {
210+
compatible = "ti,sysc-omap2", "ti,sysc";
211+
reg = <0x48056000 0x4>,
212+
<0x4805602c 0x4>,
213+
<0x48056028 0x4>;
214+
reg-names = "rev", "sysc", "syss";
215+
ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
216+
SYSC_OMAP2_EMUFREE |
217+
SYSC_OMAP2_SOFTRESET |
218+
SYSC_OMAP2_AUTOIDLE)>;
219+
ti,sysc-midle = <SYSC_IDLE_FORCE>,
220+
<SYSC_IDLE_NO>,
221+
<SYSC_IDLE_SMART>;
222+
ti,sysc-sidle = <SYSC_IDLE_FORCE>,
223+
<SYSC_IDLE_NO>,
224+
<SYSC_IDLE_SMART>;
225+
ti,syss-mask = <1>;
226+
/* Domains (V, P, C): core, core_pwrdm, core_l3_clkdm */
227+
clocks = <&core_l3_ick>;
228+
clock-names = "ick";
229+
#address-cells = <1>;
230+
#size-cells = <1>;
231+
ranges = <0 0x48056000 0x1000>;
232+
233+
sdma: dma-controller@0 {
234+
compatible = "ti,omap3430-sdma", "ti,omap-sdma";
235+
reg = <0x0 0x1000>;
236+
interrupts = <12>,
237+
<13>,
238+
<14>,
239+
<15>;
240+
#dma-cells = <1>;
241+
dma-channels = <32>;
242+
dma-requests = <96>;
243+
};
220244
};
221245

222246
gpio1: gpio@48310000 {

‎arch/arm/boot/dts/omap36xx.dtsi

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -223,6 +223,10 @@
223223
};
224224
};
225225

226+
&sdma {
227+
compatible = "ti,omap3630-sdma", "ti,omap-sdma";
228+
};
229+
226230
/* OMAP3630 needs dss_96m_fck for VENC */
227231
&venc {
228232
clocks = <&dss_tv_fck>, <&dss_96m_fck>;

‎arch/arm/boot/dts/omap4-l4.dtsi

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -136,7 +136,6 @@
136136

137137
target-module@56000 { /* 0x4a056000, ap 7 0a.0 */
138138
compatible = "ti,sysc-omap2", "ti,sysc";
139-
ti,hwmods = "dma_system";
140139
reg = <0x56000 0x4>,
141140
<0x5602c 0x4>,
142141
<0x56028 0x4>;
@@ -160,7 +159,7 @@
160159
ranges = <0x0 0x56000 0x1000>;
161160

162161
sdma: dma-controller@0 {
163-
compatible = "ti,omap4430-sdma";
162+
compatible = "ti,omap4430-sdma", "ti,omap-sdma";
164163
reg = <0x0 0x1000>;
165164
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
166165
<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,

‎arch/arm/boot/dts/omap5-l4.dtsi

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -213,7 +213,6 @@
213213

214214
target-module@56000 { /* 0x4a056000, ap 7 02.0 */
215215
compatible = "ti,sysc-omap2", "ti,sysc";
216-
ti,hwmods = "dma_system";
217216
reg = <0x56000 0x4>,
218217
<0x5602c 0x4>,
219218
<0x56028 0x4>;
@@ -237,7 +236,7 @@
237236
ranges = <0x0 0x56000 0x1000>;
238237

239238
sdma: dma-controller@0 {
240-
compatible = "ti,omap4430-sdma";
239+
compatible = "ti,omap4430-sdma", "ti,omap-sdma";
241240
reg = <0x0 0x1000>;
242241
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
243242
<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,

‎arch/arm/mach-omap2/common.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -345,9 +345,12 @@ static inline int dra7xx_pciess_reset(struct omap_hwmod *oh)
345345
}
346346
#endif
347347

348+
struct omap_system_dma_plat_info;
349+
348350
void pdata_quirks_init(const struct of_device_id *);
349351
void omap_auxdata_legacy_init(struct device *dev);
350352
void omap_pcs_legacy_init(int irq, void (*rearm)(void));
353+
extern struct omap_system_dma_plat_info dma_plat_info;
351354

352355
struct omap_sdrc_params;
353356
extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,

‎arch/arm/mach-omap2/dma.c

Lines changed: 16 additions & 103 deletions
Original file line numberDiff line numberDiff line change
@@ -30,10 +30,6 @@
3030
#include <linux/omap-dma.h>
3131

3232
#include "soc.h"
33-
#include "omap_hwmod.h"
34-
#include "omap_device.h"
35-
36-
static enum omap_reg_offsets dma_common_ch_end;
3733

3834
static const struct omap_dma_reg reg_map[] = {
3935
[REVISION] = { 0x0000, 0x00, OMAP_DMA_REG_32BIT },
@@ -81,42 +77,6 @@ static const struct omap_dma_reg reg_map[] = {
8177
[CCDN] = { 0x00d8, 0x60, OMAP_DMA_REG_32BIT },
8278
};
8379

84-
static void __iomem *dma_base;
85-
static inline void dma_write(u32 val, int reg, int lch)
86-
{
87-
void __iomem *addr = dma_base;
88-
89-
addr += reg_map[reg].offset;
90-
addr += reg_map[reg].stride * lch;
91-
92-
writel_relaxed(val, addr);
93-
}
94-
95-
static inline u32 dma_read(int reg, int lch)
96-
{
97-
void __iomem *addr = dma_base;
98-
99-
addr += reg_map[reg].offset;
100-
addr += reg_map[reg].stride * lch;
101-
102-
return readl_relaxed(addr);
103-
}
104-
105-
static void omap2_clear_dma(int lch)
106-
{
107-
int i;
108-
109-
for (i = CSDP; i <= dma_common_ch_end; i += 1)
110-
dma_write(0, i, lch);
111-
}
112-
113-
static void omap2_show_dma_caps(void)
114-
{
115-
u8 revision = dma_read(REVISION, 0) & 0xff;
116-
printk(KERN_INFO "OMAP DMA hardware revision %d.%d\n",
117-
revision >> 4, revision & 0xf);
118-
}
119-
12080
static unsigned configure_dma_errata(void)
12181
{
12282
unsigned errata = 0;
@@ -211,82 +171,35 @@ static const struct dma_slave_map omap24xx_sdma_dt_map[] = {
211171
{ "musb-hdrc.1.auto", "dmareq5", SDMA_FILTER_PARAM(64) }, /* OMAP2420 only */
212172
};
213173

214-
static struct omap_system_dma_plat_info dma_plat_info __initdata = {
215-
.reg_map = reg_map,
216-
.channel_stride = 0x60,
217-
.show_dma_caps = omap2_show_dma_caps,
218-
.clear_dma = omap2_clear_dma,
219-
.dma_write = dma_write,
220-
.dma_read = dma_read,
174+
static struct omap_dma_dev_attr dma_attr = {
175+
.dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
176+
IS_CSSA_32 | IS_CDSA_32,
177+
.lch_count = 32,
221178
};
222179

223-
static struct platform_device_info omap_dma_dev_info __initdata = {
224-
.name = "omap-dma-engine",
225-
.id = -1,
226-
.dma_mask = DMA_BIT_MASK(32),
180+
struct omap_system_dma_plat_info dma_plat_info = {
181+
.reg_map = reg_map,
182+
.channel_stride = 0x60,
183+
.dma_attr = &dma_attr,
227184
};
228185

229186
/* One time initializations */
230-
static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
187+
static int __init omap2_system_dma_init(void)
231188
{
232-
struct platform_device *pdev;
233-
struct omap_system_dma_plat_info p;
234-
struct omap_dma_dev_attr *d;
235-
struct resource *mem;
236-
char *name = "omap_dma_system";
237-
238-
p = dma_plat_info;
239-
p.dma_attr = (struct omap_dma_dev_attr *)oh->dev_attr;
240-
p.errata = configure_dma_errata();
189+
dma_plat_info.errata = configure_dma_errata();
241190

242191
if (soc_is_omap24xx()) {
243192
/* DMA slave map for drivers not yet converted to DT */
244-
p.slave_map = omap24xx_sdma_dt_map;
245-
p.slavecnt = ARRAY_SIZE(omap24xx_sdma_dt_map);
193+
dma_plat_info.slave_map = omap24xx_sdma_dt_map;
194+
dma_plat_info.slavecnt = ARRAY_SIZE(omap24xx_sdma_dt_map);
246195
}
247196

248-
pdev = omap_device_build(name, 0, oh, &p, sizeof(p));
249-
if (IS_ERR(pdev)) {
250-
pr_err("%s: Can't build omap_device for %s:%s.\n",
251-
__func__, name, oh->name);
252-
return PTR_ERR(pdev);
253-
}
254-
255-
omap_dma_dev_info.res = pdev->resource;
256-
omap_dma_dev_info.num_res = pdev->num_resources;
197+
if (!soc_is_omap242x())
198+
dma_attr.dev_caps |= IS_RW_PRIORITY;
257199

258-
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
259-
if (!mem) {
260-
dev_err(&pdev->dev, "%s: no mem resource\n", __func__);
261-
return -EINVAL;
262-
}
263-
264-
dma_base = ioremap(mem->start, resource_size(mem));
265-
if (!dma_base) {
266-
dev_err(&pdev->dev, "%s: ioremap fail\n", __func__);
267-
return -ENOMEM;
268-
}
269-
270-
d = oh->dev_attr;
271-
272-
if (cpu_is_omap34xx() && (omap_type() != OMAP2_DEVICE_TYPE_GP))
273-
d->dev_caps |= HS_CHANNELS_RESERVED;
274-
275-
if (platform_get_irq_byname(pdev, "0") < 0)
276-
d->dev_caps |= DMA_ENGINE_HANDLE_IRQ;
277-
278-
/* Check the capabilities register for descriptor loading feature */
279-
if (dma_read(CAPS_0, 0) & DMA_HAS_DESCRIPTOR_CAPS)
280-
dma_common_ch_end = CCDN;
281-
else
282-
dma_common_ch_end = CCFN;
200+
if (soc_is_omap34xx() && (omap_type() != OMAP2_DEVICE_TYPE_GP))
201+
dma_attr.dev_caps |= HS_CHANNELS_RESERVED;
283202

284203
return 0;
285204
}
286-
287-
static int __init omap2_system_dma_init(void)
288-
{
289-
return omap_hwmod_for_each_by_class("dma",
290-
omap2_system_dma_init_dev, NULL);
291-
}
292205
omap_arch_initcall(omap2_system_dma_init);

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