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rswitch: Fix PHY station management clock setting
Fix the MPIC.PSMCS value following the programming example in the section 6.4.2 Management Data Clock (MDC) Setting, Ethernet MAC IP, S4 Hardware User Manual Rev.1.00. The value is calculated by MPIC.PSMCS = clk[MHz] / (MDC frequency[MHz] * 2) - 1 with the input clock frequency from clk_get_rate() and MDC frequency of 2.5MHz. Otherwise, this driver cannot communicate PHYs on the R-Car S4 Starter Kit board. Fixes: 3590918 ("net: ethernet: renesas: Add support for "Ethernet Switch"") Reported-by: Tam Nguyen <[email protected]> Signed-off-by: Yoshihiro Shimoda <[email protected]> Tested-by: Kuninori Morimoto <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
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drivers/net/ethernet/renesas/rswitch.c

Lines changed: 12 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,7 @@
44
* Copyright (C) 2022 Renesas Electronics Corporation
55
*/
66

7+
#include <linux/clk.h>
78
#include <linux/dma-mapping.h>
89
#include <linux/err.h>
910
#include <linux/etherdevice.h>
@@ -1049,7 +1050,7 @@ static void rswitch_rmac_setting(struct rswitch_etha *etha, const u8 *mac)
10491050
static void rswitch_etha_enable_mii(struct rswitch_etha *etha)
10501051
{
10511052
rswitch_modify(etha->addr, MPIC, MPIC_PSMCS_MASK | MPIC_PSMHT_MASK,
1052-
MPIC_PSMCS(0x05) | MPIC_PSMHT(0x06));
1053+
MPIC_PSMCS(etha->psmcs) | MPIC_PSMHT(0x06));
10531054
rswitch_modify(etha->addr, MPSM, 0, MPSM_MFF_C45);
10541055
}
10551056

@@ -1693,6 +1694,12 @@ static void rswitch_etha_init(struct rswitch_private *priv, int index)
16931694
etha->index = index;
16941695
etha->addr = priv->addr + RSWITCH_ETHA_OFFSET + index * RSWITCH_ETHA_SIZE;
16951696
etha->coma_addr = priv->addr;
1697+
1698+
/* MPIC.PSMCS = (clk [MHz] / (MDC frequency [MHz] * 2) - 1.
1699+
* Calculating PSMCS value as MDC frequency = 2.5MHz. So, multiply
1700+
* both the numerator and the denominator by 10.
1701+
*/
1702+
etha->psmcs = clk_get_rate(priv->clk) / 100000 / (25 * 2) - 1;
16961703
}
16971704

16981705
static int rswitch_device_alloc(struct rswitch_private *priv, int index)
@@ -1900,6 +1907,10 @@ static int renesas_eth_sw_probe(struct platform_device *pdev)
19001907
return -ENOMEM;
19011908
spin_lock_init(&priv->lock);
19021909

1910+
priv->clk = devm_clk_get(&pdev->dev, NULL);
1911+
if (IS_ERR(priv->clk))
1912+
return PTR_ERR(priv->clk);
1913+
19031914
attr = soc_device_match(rswitch_soc_no_speed_change);
19041915
if (attr)
19051916
priv->etha_no_runtime_change = true;

drivers/net/ethernet/renesas/rswitch.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -915,6 +915,7 @@ struct rswitch_etha {
915915
bool external_phy;
916916
struct mii_bus *mii;
917917
phy_interface_t phy_interface;
918+
u32 psmcs;
918919
u8 mac_addr[MAX_ADDR_LEN];
919920
int link;
920921
int speed;
@@ -1012,6 +1013,7 @@ struct rswitch_private {
10121013
struct rswitch_mfwd mfwd;
10131014

10141015
spinlock_t lock; /* lock interrupt registers' control */
1016+
struct clk *clk;
10151017

10161018
bool etha_no_runtime_change;
10171019
bool gwca_halt;

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