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Merge tag 'spi-v5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown: "This has been a very active release for the DesignWare driver in particular - after a long period of inactivity we have had a lot of people actively working on it for unrelated reasons this cycle with some of that work still not landed. Otherwise it's been fairly quiet for the subsystem. Highlights include: - Lots of performance improvements and fixes for the DesignWare driver from Serge Semin, Andy Shevchenko, Wan Ahmad Zainie, Clement Leger, Dinh Nguyen and Jarkko Nikula. - Support for octal mode transfers in spidev. - Slave mode support for the Rockchip drivers. - Support for AMD controllers, Broadcom mspi and Raspberry Pi 4, and Intel Elkhart Lake" * tag 'spi-v5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (125 commits) spi: spi-fsl-dspi: fix native data copy spi: Convert DW SPI binding to DT schema spi: dw: Refactor mid_spi_dma_setup() to separate DMA and IRQ config spi: dw: Make DMA request line assignments explicit for Intel Medfield spi: bcm2835: Remove shared interrupt support dt-bindings: snps,dw-apb-ssi: add optional reset property spi: dw: add reset control spi: bcm2835: Enable shared interrupt support spi: bcm2835: Implement shutdown callback spi: dw: Use regset32 DebugFS method to create regdump file spi: dw: Add DMA support to the DW SPI MMIO driver spi: dw: Cleanup generic DW DMA code namings spi: dw: Add DW SPI DMA/PCI/MMIO dependency on the DW SPI core spi: dw: Remove DW DMA code dependency from DW_DMAC_PCI spi: dw: Move Non-DMA code to the DW PCIe-SPI driver spi: dw: Add core suffix to the DW APB SSI core source file spi: dw: Fix Rx-only DMA transfers spi: dw: Use DMA max burst to set the request thresholds spi: dw: Parameterize the DMA Rx/Tx burst length spi: dw: Add SPI Rx-done wait method to DMA-based transfer ...
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‎Documentation/devicetree/bindings/spi/brcm,spi-bcm-qspi.txt

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"brcm,spi-bcm-qspi", "brcm,spi-brcmstb-qspi" : MSPI+BSPI on BRCMSTB SoCs
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"brcm,spi-bcm-qspi", "brcm,spi-brcmstb-mspi" : Second Instance of MSPI
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BRCMSTB SoCs
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"brcm,spi-bcm7425-qspi", "brcm,spi-bcm-qspi", "brcm,spi-brcmstb-mspi" : Second Instance of MSPI
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BRCMSTB SoCs
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"brcm,spi-bcm7429-qspi", "brcm,spi-bcm-qspi", "brcm,spi-brcmstb-mspi" : Second Instance of MSPI
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BRCMSTB SoCs
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"brcm,spi-bcm7435-qspi", "brcm,spi-bcm-qspi", "brcm,spi-brcmstb-mspi" : Second Instance of MSPI
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BRCMSTB SoCs
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"brcm,spi-bcm7216-qspi", "brcm,spi-bcm-qspi", "brcm,spi-brcmstb-mspi" : Second Instance of MSPI
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BRCMSTB SoCs
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"brcm,spi-bcm7278-qspi", "brcm,spi-bcm-qspi", "brcm,spi-brcmstb-mspi" : Second Instance of MSPI
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BRCMSTB SoCs
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"brcm,spi-bcm-qspi", "brcm,spi-nsp-qspi" : MSPI+BSPI on Cygnus, NSP
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"brcm,spi-bcm-qspi", "brcm,spi-ns2-qspi" : NS2 SoCs
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‎Documentation/devicetree/bindings/spi/mikrotik,rb4xx-spi.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/spi/mikrotik,rb4xx-spi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: MikroTik RB4xx series SPI master
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maintainers:
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- Gabor Juhos <[email protected]>
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- Bert Vermeulen <[email protected]>
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allOf:
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- $ref: "spi-controller.yaml#"
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properties:
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compatible:
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const: mikrotik,rb4xx-spi
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reg:
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maxItems: 1
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required:
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- compatible
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- reg
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examples:
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- |
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spi: spi@1f000000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "mikrotik,rb4xx-spi";
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reg = <0x1f000000 0x10>;
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};
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...

‎Documentation/devicetree/bindings/spi/renesas,rspi.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/spi/renesas,rspi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Renesas (Quad) Serial Peripheral Interface (RSPI/QSPI)
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maintainers:
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- Geert Uytterhoeven <[email protected]>
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- renesas,rspi-sh7757 # SH7757
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- const: renesas,rspi # Legacy SH
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- items:
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- enum:
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- renesas,rspi-r7s72100 # RZ/A1H
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- renesas,rspi-r7s9210 # RZ/A2
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- const: renesas,rspi-rz # RZ/A
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- items:
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- enum:
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- renesas,qspi-r8a7743 # RZ/G1M
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- renesas,qspi-r8a7744 # RZ/G1N
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- renesas,qspi-r8a7745 # RZ/G1E
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- renesas,qspi-r8a77470 # RZ/G1C
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- renesas,qspi-r8a7790 # R-Car H2
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- renesas,qspi-r8a7791 # R-Car M2-W
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- renesas,qspi-r8a7792 # R-Car V2H
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- renesas,qspi-r8a7793 # R-Car M2-N
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- renesas,qspi-r8a7794 # R-Car E2
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- const: renesas,qspi # R-Car Gen2 and RZ/G1
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reg:
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maxItems: 1
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interrupts:
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oneOf:
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- items:
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- description: A combined interrupt
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- items:
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- description: Error interrupt (SPEI)
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- description: Receive Interrupt (SPRI)
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- description: Transmit Interrupt (SPTI)
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interrupt-names:
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oneOf:
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- items:
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- const: mux
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- items:
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- const: error
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- const: rx
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- const: tx
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clocks:
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maxItems: 1
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power-domains:
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maxItems: 1
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resets:
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maxItems: 1
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dmas:
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description:
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Must contain a list of pairs of references to DMA specifiers, one for
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transmission, and one for reception.
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dma-names:
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minItems: 2
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maxItems: 4
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items:
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enum:
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- tx
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- rx
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num-cs:
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description: |
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Total number of native chip selects.
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Hardware limitations related to chip selects:
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- When using GPIO chip selects, at least one native chip select must
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be left unused, as it will be driven anyway.
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minimum: 1
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maximum: 2
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default: 1
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- power-domains
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- '#address-cells'
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- '#size-cells'
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allOf:
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- $ref: spi-controller.yaml#
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- if:
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properties:
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compatible:
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contains:
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enum:
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- renesas,rspi-rz
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then:
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properties:
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interrupts:
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minItems: 3
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required:
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- interrupt-names
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- if:
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properties:
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compatible:
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contains:
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enum:
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- renesas,qspi
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then:
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required:
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- resets
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examples:
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- |
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#include <dt-bindings/clock/r8a7791-cpg-mssr.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/power/r8a7791-sysc.h>
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qspi: spi@e6b10000 {
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compatible = "renesas,qspi-r8a7791", "renesas,qspi";
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reg = <0xe6b10000 0x2c>;
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interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 917>;
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dmas = <&dmac0 0x17>, <&dmac0 0x18>, <&dmac1 0x17>, <&dmac1 0x18>;
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dma-names = "tx", "rx", "tx", "rx";
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power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
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resets = <&cpg 917>;
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num-cs = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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};

‎Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt

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‎Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml

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# SPDX-License-Identifier: GPL-2.0-only
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/spi/snps,dw-apb-ssi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Synopsys DesignWare AMBA 2.0 Synchronous Serial Interface
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maintainers:
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- Mark Brown <[email protected]>
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allOf:
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- $ref: "spi-controller.yaml#"
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- if:
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properties:
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compatible:
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contains:
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enum:
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- mscc,ocelot-spi
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- mscc,jaguar2-spi
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then:
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properties:
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reg:
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minItems: 2
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properties:
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compatible:
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oneOf:
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- description: Generic DW SPI Controller
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enum:
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- snps,dw-apb-ssi
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- snps,dwc-ssi-1.01a
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- description: Microsemi Ocelot/Jaguar2 SoC SPI Controller
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items:
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- enum:
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- mscc,ocelot-spi
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- mscc,jaguar2-spi
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- const: snps,dw-apb-ssi
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- description: Amazon Alpine SPI Controller
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const: amazon,alpine-dw-apb-ssi
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- description: Renesas RZ/N1 SPI Controller
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items:
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- const: renesas,rzn1-spi
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- const: snps,dw-apb-ssi
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- description: Intel Keem Bay SPI Controller
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const: intel,keembay-ssi
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reg:
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minItems: 1
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items:
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- description: DW APB SSI controller memory mapped registers
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- description: SPI MST region map
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interrupts:
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maxItems: 1
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clocks:
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minItems: 1
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items:
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- description: SPI Controller reference clock source
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- description: APB interface clock source
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clock-names:
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minItems: 1
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items:
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- const: ssi_clk
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- const: pclk
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resets:
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maxItems: 1
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reset-names:
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const: spi
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reg-io-width:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: I/O register width (in bytes) implemented by this device
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default: 4
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enum: [ 2, 4 ]
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num-cs:
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default: 4
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minimum: 1
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maximum: 4
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dmas:
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items:
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- description: TX DMA Channel
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- description: RX DMA Channel
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dma-names:
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items:
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- const: tx
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- const: rx
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patternProperties:
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"^.*@[0-9a-f]+$":
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type: object
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properties:
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reg:
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minimum: 0
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maximum: 3
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spi-rx-bus-width:
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const: 1
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spi-tx-bus-width:
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const: 1
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unevaluatedProperties: false
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required:
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- compatible
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- reg
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- "#address-cells"
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- "#size-cells"
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- interrupts
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- clocks
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examples:
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- |
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spi@fff00000 {
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compatible = "snps,dw-apb-ssi";
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reg = <0xfff00000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <0 154 4>;
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clocks = <&spi_m_clk>;
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num-cs = <2>;
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cs-gpios = <&gpio0 13 0>,
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<&gpio0 14 0>;
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};
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...

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